updating to working version from my pre-svn repo.

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2017 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

src/mainboard/digitallogic/msm586seg/Config.lb

@@ -5,7 +5,7 @@
 default ROM_SIZE = 512 * 1024 
 default FALLBACK_SIZE = 0x10000
 if USE_FALLBACK_IMAGE
-	default ROM_SECTION_SIZE   = 64 * 1024 # FALLBACK_SIZE
+	default ROM_SECTION_SIZE   = FALLBACK_SIZE
 	default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
 else
 	default ROM_SECTION_SIZE   = ( ROM_SIZE - FALLBACK_SIZE )
@@ -108,6 +108,11 @@ if USE_FALLBACK_IMAGE
 	mainboardinit ./failover.inc
 end
 
+
+# VGA console
+if CONFIG_CONSOLE_VGA
+	default CONFIG_PCI_ROM_RUN=1
+end
 ###
 ### O.k. We aren't just an intermediary anymore!
 ###
@@ -122,13 +127,19 @@ mainboardinit ./auto.inc
 ## Include the secondary Configuration files 
 ##
 dir /pc80
+dir /devices
 config chip.h
 
 chip cpu/amd/sc520
 	device pci_domain 0 on 
 		device pci 0.0 on end
-		device pci 1.0 on end
+	
+		chip drivers/pci/onboard
+			device pci 14.0 on end # 69000
+			register "rom_address" = "0x2000000"
+		end
 #		register "com1" = "{1}"
 #		register "com1" = "{1, 0, 0x3f8, 4}"
 	end
+
 end

src/mainboard/digitallogic/msm586seg/Options.lb

@@ -7,6 +7,7 @@ uses HAVE_OPTION_TABLE
 uses USE_OPTION_TABLE
 uses CONFIG_COMPRESS
 uses CONFIG_ROM_STREAM
+uses CONFIG_USE_INIT
 uses IRQ_SLOT_COUNT
 uses MAINBOARD
 uses MAINBOARD_VENDOR
@@ -39,6 +40,13 @@ uses CONFIG_CONSOLE_SERIAL8250
 uses DEFAULT_CONSOLE_LOGLEVEL
 uses MAXIMUM_CONSOLE_LOGLEVEL
 
+# VGA support
+uses CONFIG_CONSOLE_VGA
+uses CONFIG_LEGACY_VGABIOS
+uses VGABIOS_START
+uses CONFIG_PCI_ROM_RUN
+
+
 default CONFIG_CONSOLE_SERIAL8250=1
 default DEFAULT_CONSOLE_LOGLEVEL=9
 default MAXIMUM_CONSOLE_LOGLEVEL=9
@@ -68,7 +76,7 @@ default HAVE_HARD_RESET=1
 ## Build code to export a programmable irq routing table
 ##
 default HAVE_PIRQ_TABLE=1
-default IRQ_SLOT_COUNT=5
+default IRQ_SLOT_COUNT=7
 #object irq_tables.o
 
 ##

src/mainboard/digitallogic/msm586seg/auto.c

@@ -65,6 +65,102 @@ static inline void dumpmem(void){
   }
 }
 
+
+static inline void irqinit(void){
+	volatile unsigned char *cp;
+#if 0
+/* these values taken from the msm board itself.
+ * and they cause the board to not even come out of calibrating_delay_loop
+ * if you can believe it. Our problem right now is no IDE or serial interrupts
+ * So we'll try to put interrupts in, one at a time. IDE first. 
+ */
+	cp = (volatile unsigned char *) 0xfffefd00;
+	*cp =  0x11;
+	cp = (volatile unsigned char *) 0xfffefd02;
+	*cp =  0x02;
+	cp = (volatile unsigned char *) 0xfffefd03;
+	*cp =  0x00;
+	cp = (volatile unsigned char *) 0xfffefd04;
+	*cp =  0xf7;
+	cp = (volatile unsigned char *) 0xfffefd08;
+	*cp =  0xf7;
+	cp = (volatile unsigned char *) 0xfffefd0a;
+	*cp =  0x8b;
+	cp = (volatile unsigned char *) 0xfffefd10;
+	*cp =  0x18;
+	cp = (volatile unsigned char *) 0xfffefd14;
+	*cp =  0x09;
+	cp = (volatile unsigned char *) 0xfffefd18;
+	*cp =  0x88;
+	cp = (volatile unsigned char *) 0xfffefd1a;
+	*cp =  0x00;
+	cp = (volatile unsigned char *) 0xfffefd1b;
+	*cp =  0x00;
+	cp = (volatile unsigned char *) 0xfffefd1c;
+	*cp =  0x00;
+	cp = (volatile unsigned char *) 0xfffefd20;
+	*cp =  0x00;
+	cp = (volatile unsigned char *) 0xfffefd21;
+	*cp =  0x00;
+	cp = (volatile unsigned char *) 0xfffefd22;
+	*cp =  0x00;
+	cp = (volatile unsigned char *) 0xfffefd28;
+	*cp =  0x00;
+	cp = (volatile unsigned char *) 0xfffefd29;
+	*cp =  0x00;
+	cp = (volatile unsigned char *) 0xfffefd30;
+	*cp =  0x00;
+	cp = (volatile unsigned char *) 0xfffefd31;
+	*cp =  0x00;
+	cp = (volatile unsigned char *) 0xfffefd32;
+	*cp =  0x00;
+	cp = (volatile unsigned char *) 0xfffefd33;
+	*cp =  0x00;
+	cp = (volatile unsigned char *) 0xfffefd40;
+	*cp =  0x10;
+	cp = (volatile unsigned char *) 0xfffefd41;
+	*cp =  0x00;
+	cp = (volatile unsigned char *) 0xfffefd42;
+	*cp =  0x00;
+	cp = (volatile unsigned char *) 0xfffefd43;
+	*cp =  0x00;
+	cp = (volatile unsigned char *) 0xfffefd44;
+	*cp =  0x00;
+	cp = (volatile unsigned char *) 0xfffefd45;
+	*cp =  0x00;
+	cp = (volatile unsigned char *) 0xfffefd46;
+	*cp =  0x00;
+	cp = (volatile unsigned char *) 0xfffefd50;
+	*cp =  0x37;
+	cp = (volatile unsigned char *) 0xfffefd51;
+	*cp =  0x00;
+	cp = (volatile unsigned char *) 0xfffefd52;
+	*cp =  0x00;
+	cp = (volatile unsigned char *) 0xfffefd53;
+	*cp =  0x00;
+	cp = (volatile unsigned char *) 0xfffefd54;
+	*cp =  0x37;
+	cp = (volatile unsigned char *) 0xfffefd55;
+	*cp =  0x00;
+	cp = (volatile unsigned char *) 0xfffefd56;
+	*cp =  0x37;
+	cp = (volatile unsigned char *) 0xfffefd57;
+	*cp =  0x00;
+	cp = (volatile unsigned char *) 0xfffefd58;
+	*cp =  0xff;
+	cp = (volatile unsigned char *) 0xfffefd59;
+	*cp =  0xff;
+	cp = (volatile unsigned char *) 0xfffefd5a;
+	*cp =  0xff;
+#endif
+#if 0
+	/* this fails too */
+	/* IDE only ... */
+	cp = (volatile unsigned char *) 0xfffefd56;
+	*cp =  0xe;
+#endif
+}
+
 static void main(unsigned long bist)
 {
     volatile int i;
@@ -73,6 +169,7 @@ static void main(unsigned long bist)
 
 
         setupsc520();
+	irqinit();
         uart_init();
         console_init();
 		for(i = 0; i < 100; i++)
@@ -123,11 +220,11 @@ static void main(unsigned long bist)
 	// Check 32MB of memory @ 0
 	ram_check(0x00000000, 0x02000000);
 #endif
-#if 0
+#if 1
 	{
-	  volatile unsigned char *src = (unsigned char *) 0x2000000 + 0x70000;
+	  volatile unsigned char *src = (unsigned char *) 0x2000000 + 0x60000;
 	  volatile unsigned char *dst = (unsigned char *) 0x4000; 
-	  for(i = 0; i < 0x10000; i++) {
+	  for(i = 0; i < 0x20000; i++) {
 	    /*
 	      print_err("Set dst "); print_err_hex32((unsigned long) dst); 
 	      print_err(" to "); print_err_hex32(*src); print_err("\r\n");

src/mainboard/digitallogic/msm586seg/irq_tables.c

@@ -1,36 +1,32 @@
 /* This file was generated by getpir.c, do not modify! 
    (but if you do, please run checkpir on it to verify)
-   Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
+ * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up
-
+ *
-   Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM
+ * Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM
 */
 
 #include <arch/pirq_routing.h>
 
 const struct irq_routing_table intel_irq_routing_table = {
-	PIRQ_SIGNATURE, /* u32 signature */
+	PIRQ_SIGNATURE,  /* u32 signature */
-	PIRQ_VERSION,   /* u16 version   */
+	PIRQ_VERSION,    /* u16 version   */
-	32+16*5,        /* there can be total 5 devices on the bus */
+	32+16*7,	 /* there can be total 7 devices on the bus */
-	0,              /* Where the interrupt router lies (bus) */
+	0x00,		 /* Where the interrupt router lies (bus) */
-	0x88,           /* Where the interrupt router lies (dev) */
+	(0x00<<3)|0x0,   /* Where the interrupt router lies (dev) */
-	0x1c20,         /* IRQs devoted exclusively to PCI usage */
+	0,		 /* IRQs devoted exclusively to PCI usage */
-	0x1106,         /* Vendor */
+	0x8086,		 /* Vendor */
-	0x8231,         /* Device */
+	0x122e,		 /* Device */
-	0,              /* Crap (miniport) */
+	0,		 /* Crap (miniport) */
 	{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
-	0x5e,         /*  u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */
+	0x50,         /*  u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */
 	{
-		/* 8231 ethernet */
+		/* bus,     dev|fn,   {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap},  slot, rfu */
-		{0,0x90, {{0x1, 0xdeb8}, {0x2, 0xdeb8}, {0x3, 0xdeb8}, {0x4, 0xdeb8}}, 0x1, 0},
+		{0x00,(0x09<<3)|0x0, {{0x30, 0x8e80}, {0x31, 0x8e80}, {0x32, 0x8e80}, {0x33, 0x08e80}}, 0x1, 0x0},
-		/* 8231 internal */
+		{0x00,(0x0a<<3)|0x0, {{0x31, 0x8e80}, {0x32, 0x8e80}, {0x33, 0x8e80}, {0x30, 0x08e80}}, 0x2, 0x0},
-		{0,0x88, {{0x2, 0xdeb8}, {0x3, 0xdeb8}, {0x4, 0xdeb8}, {0x1, 0xdeb8}}, 0x2, 0},
+		{0x00,(0x0b<<3)|0x0, {{0x32, 0x8e80}, {0x33, 0x8e80}, {0x30, 0x8e80}, {0x31, 0x08e80}}, 0x3, 0x0},
-		/* PCI slot */
+		{0x00,(0x0c<<3)|0x0, {{0x33, 0x8e80}, {0x30, 0x8e80}, {0x31, 0x8e80}, {0x32, 0x08e80}}, 0x4, 0x0},
-		{0,0xa0, {{0x3, 0xdeb8}, {0x4, 0xdeb8}, {0x1, 0xdeb8}, {0x2, 0xdeb8}}, 0, 0},
+		{0x00,(0x0f<<3)|0x0, {{0x32, 0x8e80}, {0x00, 0x8e80}, {0x00, 0x8e80}, {0x00, 0x08e80}}, 0x0, 0x0},
-		{0,0x50, {{0x4, 0xdeb8}, {0x3, 0xdeb8}, {0x2, 0xdeb8}, {0x1, 0xdeb8}}, 0x3, 0},
+		{0x00,(0x12<<3)|0x0, {{0x30, 0x8e80}, {0x00, 0x8e80}, {0x00, 0x8e80}, {0x00, 0x08e80}}, 0x0, 0x0},
-		{0,0x98, {{0x4, 0xdeb8}, {0x3, 0xdeb8}, {0x2, 0xdeb8}, {0x1, 0xdeb8}}, 0x4, 0},
+		{0x00,(0x14<<3)|0x0, {{0x30, 0x8e80}, {0x31, 0x8e80}, {0x32, 0x8e80}, {0x33, 0x08e80}}, 0x0, 0x0},
 	}
 };
-unsigned long write_pirq_routing_table(unsigned long addr)
-{
-        return copy_pirq_routing_table(addr);
-}

src/mainboard/digitallogic/msm586seg/mainboard.c

@@ -3,9 +3,139 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
+#include <cpu/amd/sc520.h>
 #include "chip.h"
 
+
+static void irqdump()
+{
+  volatile unsigned char *irq;
+  void *mmcr;
+
+
+  int i;
+  int irqlist[] = {0xd00, 0xd02, 0xd03, 0xd04, 0xd08, 0xd0a,
+	        0xd14, 0xd18, 0xd1a, 0xd1b, 0xd1c,
+		0xd20, 0xd21, 0xd22, 0xd28, 0xd29, 
+		0xd30, 0xd31, 0xd32, 0xd33,
+		0xd40, 0xd41, 0xd42, 0xd43,0xd44, 0xd45, 0xd46, 
+		0xd50, 0xd51, 0xd52, 0xd53,0xd54, 0xd55, 0xd56, 0xd57,0xd58, 0xd59, 0xd5a, 
+		-1};
+  mmcr = (void *) 0xfffef000;
+
+  printk_err("mmcr is %p\n", mmcr);
+  for(i = 0; irqlist[i] >= 0; i++) {
+    irq = mmcr + irqlist[i];
+    printk_err("0x%x register @%p is 0x%lx\n", irqlist[i], irq, *irq);
+  }
+
+}
+
+/* TODO: finish up mmcr struct in sc520.h, and;
+   - set ADDDECTL (now done in raminit.c in cpu/amd/sc520
+*/
+static void enable_dev(struct device *dev) {
+	volatile struct mmcrpic *pic = MMCRPIC;
+	volatile struct mmcr *mmcr = MMCRDEFAULT;
+
+	/* msm586seg has this register set to a weird value. 
+	 * follow the board, not the manual!
+	 */
+
+	/* currently, nothing in the device to use, so ignore it. */
+	printk_err("digital logic msm586 seg ENTER %s\n", __FUNCTION__);
+
+
+	/* from fuctory bios */
+	/* NOTE: the following interrupt settings made interrupts work
+	 * for hard drive, and serial, but not for ethernet 
+	 */
+	/* just do what they say and nobody gets hurt. */
+	mmcr->pic.pcicr = 0 ; // M_GINT_MODE | M_S1_MODE | M_S2_MODE;
+	/* all ints to level */
+	mmcr->pic.mpicmode = 0;
+	mmcr->pic.sl1picmode = 0;
+	mmcr->pic.sl2picmode = 0x80;
+
+	mmcr->pic.intpinpol = 0;
+
+	mmcr->pic.pit0map = 1;
+	mmcr->pic.uart1map = 0xc;
+	mmcr->pic.uart2map = 0xb;
+	mmcr->pic.rtcmap = 3;
+	mmcr->pic.ferrmap = 8;
+	mmcr->pic.gp0imap = 6;
+	mmcr->pic.gp1imap = 2;
+	mmcr->pic.gp2imap = 7;
+	mmcr->pic.gp6imap = 0x15;
+	mmcr->pic.gp7imap = 0x16;
+	mmcr->pic.gp10imap = 0x9;
+	mmcr->pic.gp9imap = 0x4;
+
+
+
+
+
+	irqdump();
+	printk_err("uart 1 ctl is 0x%x\n", *(unsigned char *) 0xfffefcc0);
+
+	printk_err("0xc20 ctl is 0x%x\n", *(unsigned short *) 0xfffefc20);
+	printk_err("0xc22 0x%x\n", *(unsigned short *) 0xfffefc22b);
+
+	/* The following block has NOT proven sufficient to get
+	 * the VGA hardware to talk to us 
+	 */
+	/* let's set some mmcr stuff per the BIOS settings */
+	mmcr->dbctl.dbctl = 0x10;
+	mmcr->sysarb.ctl = 6;
+	mmcr->sysarb.menb = 0xf;
+	mmcr->sysarb.prictl = 0xc0000f0f;
+	/* this is bios setting, depends on sysarb above */
+	mmcr->hostbridge.ctl = 0x108;
+	printk_err("digital logic msm586 seg EXIT %s\n", __FUNCTION__);
+
+	/* pio */
+	mmcr->pio.data31_16 = 0xffbf;
+
+	/* pci stuff */
+	mmcr->pic.pciintamap = 0xa;
+
+	/* END block where vga hardware still will not talk to us */
+	/* all we get from VGA I/O addresses are ffff etc.
+	 */
+	mmcr->sysmap.adddecctl = 0x10;
+
+	/* VGA now talks to us, so this adddecctl was the trick. 
+	 * still no interrupts from enet. 
+	 * Let's try fixing the piodata stuff, as there may be 
+	 * some wire there not documented.
+	 */
+	mmcr->pio.data31_16 = 0xffbf;
+	/* also, our sl?picmode needs to match fuctory bios */
+	mmcr->pic.sl1picmode = 0x80;
+	mmcr->pic.sl2picmode = 0x0;
+	/* and, finally, they do set gp5imap and we don't. 
+	 */
+	mmcr->pic.gp5imap = 0xd;
+	/* remaining problem: almost certainly, the irq table is bogus
+	 * NO SHOCK as it came from fuctory bios. 
+	 * but let's try these 4 changes for now and see what shakes.
+	 */
+	/* still not interrupts. */
+	/* their IRQ table is wrong. Just hardwire it */
+	{
+	  char pciints[4] = {15, 15, 15, 15};
+	  pci_assign_irqs(0, 12, pciints);
+	}
+	/* the assigned failed but we just noticed -- there is no
+	 * dma mapping, and selftest on e100 requires that dma work
+	 */
+	/* follow fuctory here */
+	mmcr->dmacontrol.extchanmapa = 0x3210;
+	
+}
 struct chip_operations mainboard_digitallogic_msm586seg_ops = {
 	CHIP_NAME("Digital Logic MSM586SEG mainboard ")
+	.enable_dev = enable_dev
 };