util/amdfwtool: Fix whitespace
Change-Id: I33e41b745e7ec55ed39d7125fc74b1619d28bb54 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/17325 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
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@ -76,7 +76,7 @@
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#define AMD_ROMSIG_OFFSET 0x20000
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#define MIN_ROM_KB 256
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#define ALIGN(val, by) (((val) + (by)-1)&~((by)-1))
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#define ALIGN(val, by) (((val) + (by) - 1) & ~((by) - 1))
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/*
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Reserved for future.
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@ -266,7 +266,7 @@ static void fill_psp_head(uint32_t *pspdir, uint32_t count)
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pspdir[0] = 0x50535024; /* 'PSP$' */
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pspdir[2] = count; /* size */
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pspdir[3] = 0;
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pspdir[1] = fletcher32((uint16_t *)&pspdir[1], (count *16 + 16)/2 - 2);
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pspdir[1] = fletcher32((uint16_t *)&pspdir[1], (count * 16 + 16) / 2 - 2);
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}
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static uint32_t integrate_firmwares(char *base, uint32_t pos, uint32_t *romsig, amd_fw_entry *fw_table, uint32_t rom_size)
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@ -276,9 +276,9 @@ static uint32_t integrate_firmwares(char *base, uint32_t pos, uint32_t *romsig,
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int i;
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uint32_t rom_base_address = 0xFFFFFFFF - rom_size + 1;
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for (i = 0; fw_table[i].type != AMD_FW_INVALID; i ++) {
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for (i = 0; fw_table[i].type != AMD_FW_INVALID; i++) {
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if (fw_table[i].filename != NULL) {
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fd = open (fw_table[i].filename, O_RDONLY);
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fd = open(fw_table[i].filename, O_RDONLY);
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fstat(fd, &fd_stat);
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switch (fw_table[i].type) {
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@ -308,7 +308,7 @@ static uint32_t integrate_firmwares(char *base, uint32_t pos, uint32_t *romsig,
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read(fd, (void *)(base + pos), (size_t)fd_stat.st_size);
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pos += fd_stat.st_size;
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close (fd);
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close(fd);
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pos = ALIGN(pos, 0x100U);
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}
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}
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@ -323,7 +323,7 @@ static uint32_t integrate_psp_firmwares(char *base, uint32_t pos, uint32_t *pspd
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unsigned int i;
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uint32_t rom_base_address = 0xFFFFFFFF - rom_size + 1;
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for (i = 0; fw_table[i].type != AMD_FW_INVALID; i ++) {
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for (i = 0; fw_table[i].type != AMD_FW_INVALID; i++) {
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if (fw_table[i].type == AMD_PSP_FUSE_CHAIN) {
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pspdir[4+4*i+0] = fw_table[i].type;
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pspdir[4+4*i+1] = 0xFFFFFFFF;
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@ -332,7 +332,7 @@ static uint32_t integrate_psp_firmwares(char *base, uint32_t pos, uint32_t *pspd
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} else if (fw_table[i].filename != NULL) {
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pspdir[4+4*i+0] = fw_table[i].type;
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fd = open (fw_table[i].filename, O_RDONLY);
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fd = open(fw_table[i].filename, O_RDONLY);
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fstat(fd, &fd_stat);
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pspdir[4+4*i+1] = (uint32_t)fd_stat.st_size;
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@ -343,14 +343,14 @@ static uint32_t integrate_psp_firmwares(char *base, uint32_t pos, uint32_t *pspd
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printf("Error: Specified ROM size of %d"
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" will not fit %s. Exiting.\n",
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rom_size, fw_table[i].filename);
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free (base);
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free(base);
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exit(1);
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}
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read(fd, (void *)(base + pos), (size_t)fd_stat.st_size);
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pos += fd_stat.st_size;
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close (fd);
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close(fd);
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pos = ALIGN(pos, 0x100U);
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} else {
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/* This APU doesn't have this firmware. */
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@ -396,7 +396,7 @@ static struct option long_options[] = {
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{"securedebug2", required_argument, 0, 'D' },
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{"trustlets2", required_argument, 0, 'T' },
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{"trustletkey2", required_argument, 0, 'U' },
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{"smufirmware2_2",required_argument, 0, 'W' },
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{"smufirmware2_2", required_argument, 0, 'W' },
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{"smuscs2", required_argument, 0, 'M' },
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#endif
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@ -411,7 +411,7 @@ static void register_fw_filename(amd_fw_type type, char filename[], int pspflag)
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{
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unsigned int i;
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for (i = 0; i < sizeof(amd_fw_table)/sizeof(amd_fw_entry); i++) {
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for (i = 0; i < sizeof(amd_fw_table) / sizeof(amd_fw_entry); i++) {
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if (amd_fw_table[i].type == type) {
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amd_fw_table[i].filename = filename;
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return;
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@ -419,7 +419,7 @@ static void register_fw_filename(amd_fw_type type, char filename[], int pspflag)
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}
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if (pspflag == 1) {
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for (i = 0; i < sizeof(amd_psp_fw_table)/sizeof(amd_fw_entry); i++) {
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for (i = 0; i < sizeof(amd_psp_fw_table) / sizeof(amd_fw_entry); i++) {
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if (amd_psp_fw_table[i].type == type) {
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amd_psp_fw_table[i].filename = filename;
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return;
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@ -429,7 +429,7 @@ static void register_fw_filename(amd_fw_type type, char filename[], int pspflag)
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#if PSP2
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if (pspflag == 2) {
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for (i = 0; i < sizeof(amd_psp2_fw_table)/sizeof(amd_fw_entry); i++) {
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for (i = 0; i < sizeof(amd_psp2_fw_table) / sizeof(amd_fw_entry); i++) {
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if (amd_psp2_fw_table[i].type == type) {
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amd_psp2_fw_table[i].filename = filename;
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return;
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@ -629,7 +629,7 @@ int main(int argc, char **argv)
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rom = malloc(rom_size);
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if (!rom)
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return 1;
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memset (rom, 0xFF, rom_size);
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memset(rom, 0xFF, rom_size);
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current = AMD_ROMSIG_OFFSET;
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amd_romsig = (void *)(rom + AMD_ROMSIG_OFFSET);
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@ -665,7 +665,7 @@ int main(int argc, char **argv)
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/* Now the psp2dir is psp combo dir. */
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psp2dir[psp2count*4 + 0 + 4] = 0; /* 0 -Compare PSP ID, 1 -Compare chip family ID */
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psp2dir[psp2count*4 + 1 + 4] = 0x10220B00; /* TODO: PSP ID. Documentation is needed. */
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psp2dir[psp2count * 4 + 2 + 4] = current + rom_base_address;
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psp2dir[psp2count*4 + 2 + 4] = current + rom_base_address;
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pspdir = rom + current;
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psp2dir[psp2count*4 + 3 + 4] = 0;
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@ -681,7 +681,7 @@ int main(int argc, char **argv)
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psp2dir[5] = 0;
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psp2dir[6] = 0;
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psp2dir[7] = 0;
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psp2dir[1] = fletcher32((uint16_t *)&psp2dir[1], (psp2count*16 + 32)/2 - 2);
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psp2dir[1] = fletcher32((uint16_t *)&psp2dir[1], (psp2count * 16 + 32) / 2 - 2);
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#else
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current = integrate_psp_firmwares(rom, current, psp2dir, amd_psp2_fw_table, rom_size);
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#endif
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