arch/x86/car.ld: Add a Kconfig param to flag AGESA brokenness

AGESA has a lot of code in the .data section (initialized data). However
there is no such section in CAR stages as the code runs in XIP mode and
CAR is too small to contain the data section. When the linker can not
match code to a section it will just append it, which is why AGESA
worked at all.

Follow-up patches will attempt to fix AGESA and set Kconfig parameter to
'n'. After all AGESA sources have been fixed, this can be removed.

Change-Id: I311ee17e3c0bd283692194fcee63af4449583d74
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64387
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
Arthur Heymans 2022-05-16 13:20:18 +02:00 committed by Felix Held
parent e46a977541
commit cd259cb08a
2 changed files with 12 additions and 0 deletions

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@ -115,8 +115,13 @@ _rom_mtrr_base = _rom_mtrr_mask;
. = 0xffffff00;
.illegal_globals . : {
#if CONFIG(AGESA_BROKEN_DATA_SECTION)
*(EXCLUDE_FILE ("*/libagesa.*.a:" "*/romstage*/buildOpts.o" "*/romstage*/agesawrapper.o" "*/vendorcode/amd/agesa/*" "*/vendorcode/amd/cimx/*") .data)
*(EXCLUDE_FILE ("*/libagesa.*.a:" "*/romstage*/buildOpts.o" "*/romstage*/agesawrapper.o" "*/vendorcode/amd/agesa/*" "*/vendorcode/amd/cimx/*") .data.*)
#else
*(.data)
*(.data.*)
#endif
}
_bogus = ASSERT((CONFIG_DCACHE_RAM_SIZE == 0) || (SIZEOF(.car.data) <= CONFIG_DCACHE_RAM_SIZE), "Cache as RAM area is too full");

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@ -27,6 +27,13 @@ config S3_VGA_ROM_RUN
source "src/northbridge/amd/agesa/*/Kconfig"
config AGESA_BROKEN_DATA_SECTION
bool
default y
help
Select this on AGESA platforms that incorrectly use the .data
section.
# TODO: Reservation for heap seems excessive
config HEAP_SIZE
hex