mb/google/octopus/variants/fleex: Set up tcc offset for fleex

Change tcc offset from 0 to 10 for fleex.
Refer to b:117789732#1

BUG=b:117789732
TEST=Match the result from TAT UI

Change-Id: I481526ab10a16a33fe0cf9528b52b8524e012451
Signed-off-by: John Su <john_su@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/29413
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
John Su 2018-11-01 14:41:30 +08:00 committed by Furquan Shaikh
parent 0d6349ee0d
commit cd40ddfad8
1 changed files with 2 additions and 0 deletions

View File

@ -13,6 +13,8 @@ chip soc/intel/apollolake
#| I2C7 | Touchscreen |
#+-------------------+---------------------------+
register "tcc_offset" = "10"
register "common_soc_config" = "{
.gspi[0] = {
.speed_mhz = 1,