AGESA f14: Sacrifice ACPI S3 support for EARLY_CBMEM_INIT

A decision has been made that boards with LATE_CBMEM_INIT
will be dropped from coreboot master starting with next
release scheduled for October 2017.

As existing implementation of CAR teardown in AGESA can only
do either EARLY_CBMEM_INIT or ACPI S3 support, choose the former.

ACPI S3 support may be brought back at a later date for
these platforms but that requires fair amount of work fixing
the MTRR issues causing low-memory corruptions.

Change-Id: I5d21cf6cbe02ded67566d37651c2062b436739a3
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/20898
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Kyösti Mälkki 2017-07-29 14:11:03 +03:00
parent b2b1d66826
commit cd7578030b
18 changed files with 31 additions and 21 deletions

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@ -25,7 +25,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
select HAVE_ACPI_RESUME
select HAVE_ACPI_TABLES
select BOARD_ROMSIZE_KB_4096
select GFXUMA

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@ -26,7 +26,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
select HAVE_ACPI_RESUME
select HAVE_ACPI_TABLES
select BOARD_ROMSIZE_KB_4096
select GFXUMA

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@ -37,7 +37,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
select HAVE_ACPI_RESUME
select HAVE_ACPI_TABLES
select BOARD_ROMSIZE_KB_4096
select GFXUMA

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@ -25,7 +25,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
select HAVE_ACPI_RESUME
select HAVE_ACPI_TABLES
select BOARD_ROMSIZE_KB_2048
select GFXUMA

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@ -26,7 +26,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
select HAVE_ACPI_RESUME
select HAVE_ACPI_TABLES
select BOARD_ROMSIZE_KB_2048
select GFXUMA

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@ -25,9 +25,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
# This erases 28 KB and writes 10 KB register dumps to SPI flash on every
# boot, wasting 3 s and causing wear! Therefore disable S3 for now.
#select HAVE_ACPI_RESUME
select HAVE_ACPI_TABLES
select BOARD_ROMSIZE_KB_4096
select GFXUMA

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@ -27,9 +27,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
# This erases 28 KB and writes 10 KB register dumps to SPI flash on every
# boot, wasting 3 s and causing wear! Therefore disable S3 for now.
#select HAVE_ACPI_RESUME
select HAVE_ACPI_TABLES
select BOARD_ROMSIZE_KB_4096
select GFXUMA

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@ -25,7 +25,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select SUPERIO_NUVOTON_NCT5104D
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
select HAVE_ACPI_RESUME
select HAVE_ACPI_TABLES
select HAVE_OPTION_TABLE
select HAVE_CMOS_DEFAULT

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@ -18,6 +18,7 @@ config NORTHBRIDGE_AMD_AGESA
default CPU_AMD_AGESA
select RELOCATABLE_RAMSTAGE if EARLY_CBMEM_INIT
select CBMEM_TOP_BACKUP
select LATE_CBMEM_INIT if AGESA_LEGACY_WRAPPER
if NORTHBRIDGE_AMD_AGESA

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@ -18,7 +18,6 @@ config NORTHBRIDGE_AMD_AGESA_FAMILY10
select HAVE_DEBUG_RAM_SETUP
select HAVE_DEBUG_SMBUS
select HYPERTRANSPORT_PLUGIN_SUPPORT
select LATE_CBMEM_INIT if AGESA_LEGACY_WRAPPER
if NORTHBRIDGE_AMD_AGESA_FAMILY10

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@ -17,7 +17,6 @@ config NORTHBRIDGE_AMD_AGESA_FAMILY12
select HAVE_DEBUG_RAM_SETUP
select HAVE_DEBUG_SMBUS
select HYPERTRANSPORT_PLUGIN_SUPPORT
select LATE_CBMEM_INIT
if NORTHBRIDGE_AMD_AGESA_FAMILY12

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@ -14,7 +14,6 @@
##
config NORTHBRIDGE_AMD_AGESA_FAMILY14
bool
select LATE_CBMEM_INIT
if NORTHBRIDGE_AMD_AGESA_FAMILY14

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@ -18,7 +18,6 @@ config NORTHBRIDGE_AMD_AGESA_FAMILY15
select HAVE_DEBUG_RAM_SETUP
select HAVE_DEBUG_SMBUS
select HYPERTRANSPORT_PLUGIN_SUPPORT
select LATE_CBMEM_INIT if AGESA_LEGACY_WRAPPER
if NORTHBRIDGE_AMD_AGESA_FAMILY15

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@ -14,7 +14,6 @@
##
config NORTHBRIDGE_AMD_AGESA_FAMILY15_RL
bool
select LATE_CBMEM_INIT if AGESA_LEGACY_WRAPPER
if NORTHBRIDGE_AMD_AGESA_FAMILY15_RL

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@ -14,7 +14,6 @@
##
config NORTHBRIDGE_AMD_AGESA_FAMILY15_TN
bool
select LATE_CBMEM_INIT if AGESA_LEGACY_WRAPPER
if NORTHBRIDGE_AMD_AGESA_FAMILY15_TN

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@ -15,7 +15,6 @@
##
config NORTHBRIDGE_AMD_AGESA_FAMILY16_KB
bool
select LATE_CBMEM_INIT if AGESA_LEGACY_WRAPPER
if NORTHBRIDGE_AMD_AGESA_FAMILY16_KB

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@ -611,6 +611,13 @@ fam12_enable_stack_hook_exit:
* Return any family specific controls to their 'standard'
* settings for using cache with main memory.
*
* Note: Customized for coreboot:
* A wbinvd is used to send cache to memory. The existing stack is preserved
* at its original location and additional information is preserved (e.g.
* coreboot CAR globals, heap structures, etc.). This implementation should
* NOT be used with S3 resume IF the stack/cache area is not reserved and
* over system memory.
*
* Inputs:
* ESI - [31:24] flags; [15,8]= Node#; [7,0]= core#
* Outputs:
@ -665,7 +672,14 @@ fam12_enable_stack_hook_exit:
mov %ax, %bx # Save INVD -> WBINVD bit
btr $INVD_WBINVD, %eax # Disable INVD -> WBINVD conversion
_WRMSR
invd # Clear the cache tag RAMs
#--------------------------------------------------------------------------
# Send cache to memory. Preserve stack and coreboot CAR globals.
# This shouldn't be used with S3 resume IF the stack/cache area is
# not reserved and over system memory.
#--------------------------------------------------------------------------
wbinvd
mov %bx, %ax # Restore INVD -> WBINVD bit
_WRMSR

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@ -770,6 +770,13 @@ fam14_enable_stack_hook_exit:
* Return any family specific controls to their 'standard'
* settings for using cache with main memory.
*
* Note: Customized for coreboot:
* A wbinvd is used to send cache to memory. The existing stack is preserved
* at its original location and additional information is preserved (e.g.
* coreboot CAR globals, heap structures, etc.). This implementation should
* NOT be used with S3 resume IF the stack/cache area is not reserved and
* over system memory.
*
* Inputs:
* ESI - [31:24] flags; [15,8]= Node#; [7,0]= core#
* Outputs:
@ -813,7 +820,14 @@ fam14_enable_stack_hook_exit:
_RDMSR
btr $INVD_WBINVD, %eax # Disable INVD -> WBINVD conversion
_WRMSR
invd # Clear the cache tag RAMs
#--------------------------------------------------------------------------
# Send cache to memory. Preserve stack and coreboot CAR globals.
# This shouldn't be used with S3 resume IF the stack/cache area is
# not reserved and over system memory.
#--------------------------------------------------------------------------
wbinvd
bts $INVD_WBINVD, %eax # Turn on Conversion of INVD to WBINVD
_WRMSR