AGESA f14: Sacrifice ACPI S3 support for EARLY_CBMEM_INIT
A decision has been made that boards with LATE_CBMEM_INIT will be dropped from coreboot master starting with next release scheduled for October 2017. As existing implementation of CAR teardown in AGESA can only do either EARLY_CBMEM_INIT or ACPI S3 support, choose the former. ACPI S3 support may be brought back at a later date for these platforms but that requires fair amount of work fixing the MTRR issues causing low-memory corruptions. Change-Id: I5d21cf6cbe02ded67566d37651c2062b436739a3 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/20898 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
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@ -25,7 +25,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
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select HAVE_OPTION_TABLE
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select HAVE_PIRQ_TABLE
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select HAVE_MP_TABLE
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select HAVE_ACPI_RESUME
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select HAVE_ACPI_TABLES
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select BOARD_ROMSIZE_KB_4096
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select GFXUMA
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@ -26,7 +26,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
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select HAVE_OPTION_TABLE
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select HAVE_PIRQ_TABLE
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select HAVE_MP_TABLE
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select HAVE_ACPI_RESUME
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select HAVE_ACPI_TABLES
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select BOARD_ROMSIZE_KB_4096
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select GFXUMA
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@ -37,7 +37,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
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select HAVE_OPTION_TABLE
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select HAVE_PIRQ_TABLE
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select HAVE_MP_TABLE
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select HAVE_ACPI_RESUME
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select HAVE_ACPI_TABLES
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select BOARD_ROMSIZE_KB_4096
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select GFXUMA
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@ -25,7 +25,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
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select HAVE_OPTION_TABLE
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select HAVE_PIRQ_TABLE
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select HAVE_MP_TABLE
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select HAVE_ACPI_RESUME
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select HAVE_ACPI_TABLES
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select BOARD_ROMSIZE_KB_2048
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select GFXUMA
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@ -26,7 +26,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
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select HAVE_OPTION_TABLE
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select HAVE_PIRQ_TABLE
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select HAVE_MP_TABLE
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select HAVE_ACPI_RESUME
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select HAVE_ACPI_TABLES
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select BOARD_ROMSIZE_KB_2048
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select GFXUMA
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@ -25,9 +25,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
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select HAVE_OPTION_TABLE
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select HAVE_PIRQ_TABLE
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select HAVE_MP_TABLE
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# This erases 28 KB and writes 10 KB register dumps to SPI flash on every
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# boot, wasting 3 s and causing wear! Therefore disable S3 for now.
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#select HAVE_ACPI_RESUME
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select HAVE_ACPI_TABLES
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select BOARD_ROMSIZE_KB_4096
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select GFXUMA
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@ -27,9 +27,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
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select HAVE_OPTION_TABLE
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select HAVE_PIRQ_TABLE
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select HAVE_MP_TABLE
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# This erases 28 KB and writes 10 KB register dumps to SPI flash on every
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# boot, wasting 3 s and causing wear! Therefore disable S3 for now.
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#select HAVE_ACPI_RESUME
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select HAVE_ACPI_TABLES
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select BOARD_ROMSIZE_KB_4096
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select GFXUMA
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@ -25,7 +25,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
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select SUPERIO_NUVOTON_NCT5104D
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select HAVE_PIRQ_TABLE
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select HAVE_MP_TABLE
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select HAVE_ACPI_RESUME
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select HAVE_ACPI_TABLES
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select HAVE_OPTION_TABLE
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select HAVE_CMOS_DEFAULT
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@ -18,6 +18,7 @@ config NORTHBRIDGE_AMD_AGESA
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default CPU_AMD_AGESA
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select RELOCATABLE_RAMSTAGE if EARLY_CBMEM_INIT
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select CBMEM_TOP_BACKUP
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select LATE_CBMEM_INIT if AGESA_LEGACY_WRAPPER
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if NORTHBRIDGE_AMD_AGESA
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@ -18,7 +18,6 @@ config NORTHBRIDGE_AMD_AGESA_FAMILY10
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select HAVE_DEBUG_RAM_SETUP
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select HAVE_DEBUG_SMBUS
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select HYPERTRANSPORT_PLUGIN_SUPPORT
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select LATE_CBMEM_INIT if AGESA_LEGACY_WRAPPER
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if NORTHBRIDGE_AMD_AGESA_FAMILY10
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@ -17,7 +17,6 @@ config NORTHBRIDGE_AMD_AGESA_FAMILY12
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select HAVE_DEBUG_RAM_SETUP
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select HAVE_DEBUG_SMBUS
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select HYPERTRANSPORT_PLUGIN_SUPPORT
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select LATE_CBMEM_INIT
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if NORTHBRIDGE_AMD_AGESA_FAMILY12
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@ -14,7 +14,6 @@
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##
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config NORTHBRIDGE_AMD_AGESA_FAMILY14
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bool
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select LATE_CBMEM_INIT
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if NORTHBRIDGE_AMD_AGESA_FAMILY14
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@ -18,7 +18,6 @@ config NORTHBRIDGE_AMD_AGESA_FAMILY15
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select HAVE_DEBUG_RAM_SETUP
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select HAVE_DEBUG_SMBUS
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select HYPERTRANSPORT_PLUGIN_SUPPORT
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select LATE_CBMEM_INIT if AGESA_LEGACY_WRAPPER
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if NORTHBRIDGE_AMD_AGESA_FAMILY15
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@ -14,7 +14,6 @@
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##
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config NORTHBRIDGE_AMD_AGESA_FAMILY15_RL
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bool
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select LATE_CBMEM_INIT if AGESA_LEGACY_WRAPPER
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if NORTHBRIDGE_AMD_AGESA_FAMILY15_RL
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@ -14,7 +14,6 @@
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##
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config NORTHBRIDGE_AMD_AGESA_FAMILY15_TN
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bool
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select LATE_CBMEM_INIT if AGESA_LEGACY_WRAPPER
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if NORTHBRIDGE_AMD_AGESA_FAMILY15_TN
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@ -15,7 +15,6 @@
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##
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config NORTHBRIDGE_AMD_AGESA_FAMILY16_KB
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bool
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select LATE_CBMEM_INIT if AGESA_LEGACY_WRAPPER
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if NORTHBRIDGE_AMD_AGESA_FAMILY16_KB
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@ -611,6 +611,13 @@ fam12_enable_stack_hook_exit:
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* Return any family specific controls to their 'standard'
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* settings for using cache with main memory.
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*
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* Note: Customized for coreboot:
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* A wbinvd is used to send cache to memory. The existing stack is preserved
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* at its original location and additional information is preserved (e.g.
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* coreboot CAR globals, heap structures, etc.). This implementation should
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* NOT be used with S3 resume IF the stack/cache area is not reserved and
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* over system memory.
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*
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* Inputs:
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* ESI - [31:24] flags; [15,8]= Node#; [7,0]= core#
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* Outputs:
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@ -665,7 +672,14 @@ fam12_enable_stack_hook_exit:
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mov %ax, %bx # Save INVD -> WBINVD bit
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btr $INVD_WBINVD, %eax # Disable INVD -> WBINVD conversion
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_WRMSR
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invd # Clear the cache tag RAMs
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#--------------------------------------------------------------------------
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# Send cache to memory. Preserve stack and coreboot CAR globals.
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# This shouldn't be used with S3 resume IF the stack/cache area is
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# not reserved and over system memory.
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#--------------------------------------------------------------------------
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wbinvd
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mov %bx, %ax # Restore INVD -> WBINVD bit
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_WRMSR
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@ -770,6 +770,13 @@ fam14_enable_stack_hook_exit:
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* Return any family specific controls to their 'standard'
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* settings for using cache with main memory.
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*
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* Note: Customized for coreboot:
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* A wbinvd is used to send cache to memory. The existing stack is preserved
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* at its original location and additional information is preserved (e.g.
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* coreboot CAR globals, heap structures, etc.). This implementation should
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* NOT be used with S3 resume IF the stack/cache area is not reserved and
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* over system memory.
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*
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* Inputs:
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* ESI - [31:24] flags; [15,8]= Node#; [7,0]= core#
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* Outputs:
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@ -813,7 +820,14 @@ fam14_enable_stack_hook_exit:
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_RDMSR
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btr $INVD_WBINVD, %eax # Disable INVD -> WBINVD conversion
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_WRMSR
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invd # Clear the cache tag RAMs
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#--------------------------------------------------------------------------
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# Send cache to memory. Preserve stack and coreboot CAR globals.
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# This shouldn't be used with S3 resume IF the stack/cache area is
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# not reserved and over system memory.
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#--------------------------------------------------------------------------
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wbinvd
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bts $INVD_WBINVD, %eax # Turn on Conversion of INVD to WBINVD
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_WRMSR
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