slippy: Enable EC SMI

Enable GPIO SMI for GPIO34 and set it as inverted so it
is only generated when it is raised by the EC.

1) ec console command: lidopen
2) wait until booted to developer screen
3) ec console command: lidclose
4) ensure system turns off

Change-Id: I7d50f171f3f4539c7c264103d1ffc7c5d0f1c7ba
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/56052
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/4177
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
This commit is contained in:
Duncan Laurie 2013-05-21 09:28:28 -07:00 committed by Stefan Reinauer
parent 8992e53c23
commit cd7bb2faab
2 changed files with 3 additions and 2 deletions

View File

@ -57,7 +57,8 @@ chip northbridge/intel/haswell
register "gen1_dec" = "0x00fc0801" register "gen1_dec" = "0x00fc0801"
register "gen2_dec" = "0x00fc0901" register "gen2_dec" = "0x00fc0901"
register "alt_gp_smi_en" = "0x0000" # EC_SMI is GPIO34
register "alt_gp_smi_en" = "0x0004"
register "gpe0_en_1" = "0x00000000" register "gpe0_en_1" = "0x00000000"
# EC_SCI is GPIO36 # EC_SCI is GPIO36
register "gpe0_en_2" = "0x00000010" register "gpe0_en_2" = "0x00000010"

View File

@ -110,7 +110,7 @@
.route = GPIO_ROUTE_SCI } .route = GPIO_ROUTE_SCI }
#define LP_GPIO_ACPI_SMI \ #define LP_GPIO_ACPI_SMI \
{ .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT, \ { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_INVERT, \
.owner = GPIO_OWNER_ACPI, \ .owner = GPIO_OWNER_ACPI, \
.route = GPIO_ROUTE_SMI } .route = GPIO_ROUTE_SMI }