soc/amd/cezanne: use common SMU S3/4/5 entry message code

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I4b9f1b71a5f8b2776c8b338351b2cca723d00598
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71877
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
This commit is contained in:
Felix Held 2023-01-12 23:10:59 +01:00
parent 43529966a0
commit cdc6e82bbc
3 changed files with 1 additions and 18 deletions

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@ -59,6 +59,7 @@ config SOC_AMD_CEZANNE
select SOC_AMD_COMMON_BLOCK_SMI select SOC_AMD_COMMON_BLOCK_SMI
select SOC_AMD_COMMON_BLOCK_SMM select SOC_AMD_COMMON_BLOCK_SMM
select SOC_AMD_COMMON_BLOCK_SMU select SOC_AMD_COMMON_BLOCK_SMU
select SOC_AMD_COMMON_BLOCK_SMU_SX_ENTRY
select SOC_AMD_COMMON_BLOCK_SPI select SOC_AMD_COMMON_BLOCK_SPI
select SOC_AMD_COMMON_BLOCK_TSC_FAM17H_19H select SOC_AMD_COMMON_BLOCK_TSC_FAM17H_19H
select SOC_AMD_COMMON_BLOCK_UART select SOC_AMD_COMMON_BLOCK_UART

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@ -44,7 +44,6 @@ ramstage-y += xhci.c
smm-y += gpio.c smm-y += gpio.c
smm-y += smihandler.c smm-y += smihandler.c
smm-y += smu.c
smm-$(CONFIG_DEBUG_SMI) += uart.c smm-$(CONFIG_DEBUG_SMI) += uart.c
CPPFLAGS_common += -I$(src)/soc/amd/cezanne/include CPPFLAGS_common += -I$(src)/soc/amd/cezanne/include

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@ -1,17 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <console/console.h>
#include <amdblocks/smu.h>
#include <soc/smu.h>
/*
* Request the SMU to put system into S3, S4, or S5. On entry, SlpTyp determines S-State and
* SlpTypeEn gets set by the SMU. Function does not return if successful.
*/
void smu_sx_entry(void)
{
struct smu_payload msg = { 0 }; /* Unused for SMC_MSG_S3ENTRY */
printk(BIOS_DEBUG, "SMU: Put system into S3/S4/S5\n");
send_smu_message(SMC_MSG_S3ENTRY, &msg);
}