soc/amd/cezanne: use common SMU S3/4/5 entry message code
Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I4b9f1b71a5f8b2776c8b338351b2cca723d00598 Reviewed-on: https://review.coreboot.org/c/coreboot/+/71877 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
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@ -59,6 +59,7 @@ config SOC_AMD_CEZANNE
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select SOC_AMD_COMMON_BLOCK_SMI
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select SOC_AMD_COMMON_BLOCK_SMI
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select SOC_AMD_COMMON_BLOCK_SMM
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select SOC_AMD_COMMON_BLOCK_SMM
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select SOC_AMD_COMMON_BLOCK_SMU
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select SOC_AMD_COMMON_BLOCK_SMU
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select SOC_AMD_COMMON_BLOCK_SMU_SX_ENTRY
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select SOC_AMD_COMMON_BLOCK_SPI
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select SOC_AMD_COMMON_BLOCK_SPI
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select SOC_AMD_COMMON_BLOCK_TSC_FAM17H_19H
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select SOC_AMD_COMMON_BLOCK_TSC_FAM17H_19H
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select SOC_AMD_COMMON_BLOCK_UART
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select SOC_AMD_COMMON_BLOCK_UART
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@ -44,7 +44,6 @@ ramstage-y += xhci.c
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smm-y += gpio.c
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smm-y += gpio.c
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smm-y += smihandler.c
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smm-y += smihandler.c
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smm-y += smu.c
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smm-$(CONFIG_DEBUG_SMI) += uart.c
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smm-$(CONFIG_DEBUG_SMI) += uart.c
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CPPFLAGS_common += -I$(src)/soc/amd/cezanne/include
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CPPFLAGS_common += -I$(src)/soc/amd/cezanne/include
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@ -1,17 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <console/console.h>
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#include <amdblocks/smu.h>
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#include <soc/smu.h>
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/*
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* Request the SMU to put system into S3, S4, or S5. On entry, SlpTyp determines S-State and
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* SlpTypeEn gets set by the SMU. Function does not return if successful.
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*/
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void smu_sx_entry(void)
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{
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struct smu_payload msg = { 0 }; /* Unused for SMC_MSG_S3ENTRY */
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printk(BIOS_DEBUG, "SMU: Put system into S3/S4/S5\n");
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send_smu_message(SMC_MSG_S3ENTRY, &msg);
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}
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