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mb/google/soraka: Camera PMIC run time power control 

Currently PMIC (tps68470) is in active state even when cameras are not
in use. PMIC is put into SLEEP mode only when entering S3 via
smihandler.

With this change PMIC will be put into SLEEP mode as soon as sensors &
VCM voltage outputs are turned off. This will allow run time power
saving when camera is not in use.

PMIC will be reset in first boot & across S3 & S0ix cycles.

Also, remove the smi handler for PMIC power management & handle it as
part of sensor and VCM ACPI PowerResource.

BUG=b:63903239
TEST= Build for Soraka. Check Camera probe, Capture image across
S3 & S0ix cycles.
Also checked the following & found no regression:
1. Typical camera use cases
2. Stability tests related to camera
3. Reliability tests related to camera
4. PnP tests related to camera
5. Latency related tests with camera

Change-Id: I23b0c0a887c9eb5d29b89f14aebba273b01228e0
Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Signed-off-by: Naresh G Solanki <naresh.solanki@intel.com>
Reviewed-on: https://review.coreboot.org/20741
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Rajmohan Mani <rajmohan.mani@intel.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Naresh G Solanki 2017-07-24 15:38:47 +05:30 committed by Furquan Shaikh
parent 251748426f
commit cdc9af9ebd
4 changed files with 45 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

43
src/mainboard/google/poppy/acpi/mipi_camera.asl
View File

@ -27,6 +27,47 @@ Scope (\_SB.PCI0.I2C2)
Return (0x0F)
}
Method (PMON, 0, Serialized) {
/*
* Turn on 3V3_VDD. It takes around 1 ms for voltage to
* settle to 3.3 Volt. Provide additional 2 ms delay.
*/
STXS(EN_PP3300_DX_CAM)
Sleep (3)
}
Method (PMOF, 0, Serialized) {
/* Make Sure all PMIC outputs are off. */
If (LEqual (VSIC, Zero)) {
CTXS(EN_PP3300_DX_CAM)
}
}
Name (_PR0, Package (0x01) { CPMC })
Name (_PR3, Package (0x01) { CPMC })
/* Power resource methods for PMIC */
PowerResource (CPMC, 0, 0) {
Name (RSTO, 1)
Method (_ON, 0, Serialized) {
PMON()
/* Do not reset PMIC across S3 and S0ix cycle */
if (Lequal (RSTO, 1)) {
CTXS(EN_CAM_PMIC_RST_L)
Sleep(1)
STXS(EN_CAM_PMIC_RST_L)
Sleep (3)
RSTO = 0
}
}
Method (_OFF, 0, Serialized) {
PMOF()
}
Method (_STA, 0, Serialized) {
Return (GTXS(EN_PP3300_DX_CAM))
}
}
/* Marks the availability of all the operation regions */
Name (AVBL, Zero)
Name (AVGP, Zero)
@ -290,6 +331,7 @@ Scope (\_SB.PCI0.I2C2)
If (LEqual (VSIC, Zero)) {
VSIO = 0
Sleep(1)
PMOF()
}
}
} ElseIf (LEqual (Arg0, 1)) {
@ -297,6 +339,7 @@ Scope (\_SB.PCI0.I2C2)
If (LLess (VSIC, 4)) {
/* Turn on VSIO */
If (LEqual (VSIC, Zero)) {
PMON()
VSIO = 3
if (LNotEqual (IOVA, 52)) {

7
src/mainboard/google/poppy/smihandler.c
View File

@ -27,17 +27,10 @@ void mainboard_smi_espi_handler(void)
chromeec_smi_process_events();
}
static void mainboard_gpio_smi_sleep(void)
{
/* Power down camera PMIC */
gpio_set(EN_PP3300_DX_CAM, 0);
}
void mainboard_smi_sleep(u8 slp_typ)
{
chromeec_smi_sleep(slp_typ, MAINBOARD_EC_S3_WAKE_EVENTS,
MAINBOARD_EC_S5_WAKE_EVENTS);
mainboard_gpio_smi_sleep();
}
int mainboard_smi_apmc(u8 apmc)

2
src/mainboard/google/poppy/variants/baseboard/gpio.c
View File

@ -145,7 +145,7 @@ static const struct pad_config gpio_table[] = {
/* C10 : UART0_RTS# ==> EC_CAM_PMIC_RST_L */
PAD_CFG_GPO(GPP_C10, 1, DEEP),
/* C11 : UART0_CTS# ==> EN_PP3300_DX_CAM */
PAD_CFG_GPO(GPP_C11, 1, DEEP),
PAD_CFG_GPO(GPP_C11, 0, DEEP),
/* C12 : UART1_RXD ==> PCH_MEM_CONFIG[0] */
PAD_CFG_GPI(GPP_C12, NONE, DEEP),
/* C13 : UART1_TXD ==> PCH_MEM_CONFIG[1] */

2
src/mainboard/google/poppy/variants/soraka/gpio.c
View File

@ -143,7 +143,7 @@ static const struct pad_config gpio_table[] = {
/* C10 : UART0_RTS# ==> EC_CAM_PMIC_RST_L */
PAD_CFG_GPO(GPP_C10, 1, DEEP),
/* C11 : UART0_CTS# ==> EN_PP3300_DX_CAM */
PAD_CFG_GPO(GPP_C11, 1, DEEP),
PAD_CFG_GPO(GPP_C11, 0, DEEP),
/* C12 : UART1_RXD ==> PCH_MEM_CONFIG[0] */
PAD_CFG_GPI(GPP_C12, NONE, DEEP),
/* C13 : UART1_TXD ==> PCH_MEM_CONFIG[1] */