mb/google/zork: Remove 50ms WIFI delay
As a part of trying to get our boot time as low as possible, any delays in the code should try to be refactored out. This removes the 50ms delay in the WIFI sequence by enabling power and putting the wifi module into reset in bootblock, then bringing it out of reset in ramstage. This is significantly longer than the 50ms requirement. The reset GPIO was already being set high in ramstage, so that code didn't need to be added. BUG=b:171513520 TEST=Boot on boards with different module types, WIFI works on both. BRANCH=Zork Signed-off-by: Martin Roth <martinroth@chromium.org> Change-Id: I211d3da338ad368d1f011f03cf7d05121c057075 Reviewed-on: https://review.coreboot.org/c/coreboot/+/47719 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
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@ -199,8 +199,8 @@ static void wifi_power_reset_configure_active_low_power(void)
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* Configure WiFi GPIOs such that:
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* Configure WiFi GPIOs such that:
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* - WIFI_AUX_RESET_L is configured first to assert PERST# to WiFi device.
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* - WIFI_AUX_RESET_L is configured first to assert PERST# to WiFi device.
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* - Enable power to WiFi using EN_PWR_WIFI_L.
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* - Enable power to WiFi using EN_PWR_WIFI_L.
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* - Wait for 50ms after power to WiFi is enabled.
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* - Wait for >50ms after power to WiFi is enabled. (Time between bootblock & ramstage)
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* - Deassert WIFI_AUX_RESET_L.
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* - WIFI_AUX_RESET_L gets deasserted later in mainboard_configure_gpios in ramstage
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*/
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*/
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static const struct soc_amd_gpio v3_wifi_table[] = {
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static const struct soc_amd_gpio v3_wifi_table[] = {
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/* WIFI_AUX_RESET_L */
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/* WIFI_AUX_RESET_L */
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@ -210,8 +210,6 @@ static void wifi_power_reset_configure_active_low_power(void)
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};
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};
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program_gpios(v3_wifi_table, ARRAY_SIZE(v3_wifi_table));
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program_gpios(v3_wifi_table, ARRAY_SIZE(v3_wifi_table));
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mdelay(50);
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gpio_set(GPIO_86, 1);
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}
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}
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static void wifi_power_reset_configure_active_high_power(void)
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static void wifi_power_reset_configure_active_high_power(void)
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