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common/block/lpss: Add CLK read function into LPSS common 

This patch add new API to read LPSS CLK register. Also combine multiple
LPSS_CLOCK_CTL_REG writes into a single write inside lpss_clk_update function.

Change-Id: I420919ad9154c4cf426bc232c5eb59d95fd698d2
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/20938
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Subrata Banik 2017-08-10 13:54:39 +05:30 committed by Aaron Durbin
parent dfeb1c4da9
commit cdea598e89
2 changed files with 14 additions and 2 deletions
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3
src/soc/intel/common/block/include/intelblocks/lpss.h
View File

@ -30,4 +30,7 @@ void lpss_clk_update(uintptr_t base, uint32_t clk_m_val, uint32_t clk_n_val);
/* Check if controller is in reset. */
bool lpss_is_controller_in_reset(uintptr_t base);
/* Read LPSS CLK register */
uint32_t lpss_clk_read(uintptr_t base);
#endif /* SOC_INTEL_COMMON_BLOCK_LPSS_H */

13
src/soc/intel/common/block/lpss/lpss.c
View File

@ -65,7 +65,16 @@ void lpss_clk_update(uintptr_t base, uint32_t clk_m_val, uint32_t clk_n_val)
addr += LPSS_CLOCK_CTL_REG;
clk_sel = LPSS_CLOCK_DIV_N(clk_n_val) | LPSS_CLOCK_DIV_M(clk_m_val);
clk_sel |= LPSS_CNT_CLK_UPDATE | LPSS_CNT_CLOCK_EN;
write32(addr, clk_sel | LPSS_CNT_CLK_UPDATE);
write32(addr, clk_sel | LPSS_CNT_CLOCK_EN);
write32(addr, clk_sel);
}
uint32_t lpss_clk_read(uintptr_t base)
{
uint8_t *addr = (void *)base;
addr += LPSS_CLOCK_CTL_REG;
return read32(addr);
}