Fixes to AMD MCT code, found by Marco Schmidt <mschmidt@dspace.de>

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3802 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer 2008-12-05 22:38:18 +00:00 committed by Stefan Reinauer
parent f82a07730d
commit ce00f1d12c
2 changed files with 6 additions and 1 deletions

View File

@ -3400,6 +3400,8 @@ static void SetODTTriState(struct MCTStatStruc *pMCTstat,
u8 max_dimms;
// FIXME: skip for Ax
dev = pDCTstat->dev_dct;
/* Tri-state unused ODTs when motherboard termination is available */
max_dimms = (u8) mctGet_NVbits(NV_MAX_DIMMS);

View File

@ -197,13 +197,16 @@ u16 mctGet_NVbits(u8 index)
case NV_CS_SpareCTL:
val = 0; /* Disabled */
//val = 1; /* Enabled */
break;
case NV_SyncOnUnEccEn:
val = 0; /* Disabled */
//val = 1; /* Enabled */
break;
case NV_Unganged:
/* channel interleave is better performance than ganged mode at this time */
val = 1; /* Enabled */
//val = 0; /* Disabled */
break;
case NV_ChannelIntlv:
val = 5; /* Not currently checked in mctchi_d.c */
/* Bit 0 = 0 - Disable
@ -213,7 +216,7 @@ u16 mctGet_NVbits(u8 index)
* 10b - Hash*, XOR of address bits [20:16, 6]
* 11b - Hash*, XOR of address bits [20:16, 9]
*/
break;
}
return val;