skylake: move flash_controller.h to the proper place

I missed this in code review. This should be under the soc
directory.

BUG=chrome-os-partner:43522
BRANCH=None
TEST=Built glados.

Change-Id: Ia018c20f97f267b8f7592b2459d10eafe5ec7159
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 9c081ed6de46605b7d0a72962ac2a041c470b12c
Original-Change-Id: Ic3938fe5d71bd24a395304cfabe40eff48bc4a40
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/295239
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/11542
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Aaron Durbin 2015-08-27 14:28:35 -05:00 committed by Patrick Georgi
parent 394d6993b9
commit ce03aaf08c
3 changed files with 5 additions and 5 deletions

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@ -23,9 +23,9 @@
#include <bootstate.h> #include <bootstate.h>
#include <delay.h> #include <delay.h>
#include <device/pci_ids.h> #include <device/pci_ids.h>
#include <flash_controller.h>
#include <spi_flash.h> #include <spi_flash.h>
#include <spi-generic.h> #include <spi-generic.h>
#include <soc/flash_controller.h>
#include <soc/pci_devs.h> #include <soc/pci_devs.h>
#include <soc/spi.h> #include <soc/spi.h>

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@ -17,8 +17,8 @@
* Foundation, Inc., * Foundation, Inc.,
*/ */
#ifndef _FLASH_CONTROLLER__H_ #ifndef _SOC_FLASH_CONTROLLER__H_
#define _FLASH_CONTROLLER__H_ #define _SOC_FLASH_CONTROLLER__H_
#include <rules.h> #include <rules.h>
#include <arch/io.h> #include <arch/io.h>
@ -173,4 +173,4 @@ enum {
HSFC_FCYCLE_SHIFT = 1, HSFC_FCYCLE_SHIFT = 1,
HSFC_FDBC_SHIFT = 8, HSFC_FDBC_SHIFT = 8,
}; };
#endif /* _FLASH_CONTROLLER__H_ */ #endif /* _SOC_FLASH_CONTROLLER__H_ */

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@ -18,7 +18,7 @@
* Foundation, Inc. * Foundation, Inc.
*/ */
#include <flash_controller.h> #include <soc/flash_controller.h>
#include <soc/romstage.h> #include <soc/romstage.h>
int early_spi_read(u32 offset, u32 size, u8 *buffer) int early_spi_read(u32 offset, u32 size, u8 *buffer)