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skylake: fix VSDIO is at 0.8V when SDCard is not inserted 

1. Enable SoC SD_CMD/D* signals pull-down of 20k when SD-card
   is removed. When SD-card is disconnected, the pull-down is
   disabled.
2. Provide path for weak leakage from buffers of SD_CMD/D* signal
   to be grounded. Thus dropping voltage on the SD_CMD/D* signals to ~0V.

BUG=chrome-os-partner:54421
TEST=no power leakage when SDCard isn't inserted on skylake platform

Change-Id: I567199b172841125f8916a61a76005cfdaa62eb8
Signed-off-by: Zhuo-hao.Lee <zhuo-hao.lee@intel.com>
Reviewed-on: https://review.coreboot.org/15910
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
This commit is contained in:
Zhuo-hao.Lee 2016-07-27 13:18:22 +08:00 committed by Martin Roth
parent ec2947fb07
commit ce37e47f46
1 changed files with 16 additions and 0 deletions
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16
src/soc/intel/skylake/acpi/scs.asl
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@ -88,6 +88,14 @@ Device (SDXC)
Method (_PS0, 0, Serialized) Method (_PS0, 0, Serialized)
{ {
/* Disable 20K pull-down on CLK, CMD and DAT lines */
^^PCRA (PID_GPIOCOM3, 0x4c4, 0xFFFFEFFF)
^^PCRA (PID_GPIOCOM3, 0x4cc, 0xFFFFEFFF)
^^PCRA (PID_GPIOCOM3, 0x4d4, 0xFFFFEFFF)
^^PCRA (PID_GPIOCOM3, 0x4dc, 0xFFFFEFFF)
^^PCRA (PID_GPIOCOM3, 0x4e4, 0xFFFFEFFF)
^^PCRA (PID_GPIOCOM3, 0x4f4, 0xFFFFEFFF)
/* Disable Power Gate */ /* Disable Power Gate */
Store (0, ^PGEN) Store (0, ^PGEN)
@ -113,6 +121,14 @@ Device (SDXC)
Store (3, Local0) Store (3, Local0)
Store (Local0, ^D0D3) Store (Local0, ^D0D3)
Store (^D0D3, Local0) Store (^D0D3, Local0)
/* Enable 20K pull-down on CLK, CMD and DAT lines */
^^PCRO (PID_GPIOCOM3, 0x4c4, 0x00001000)
^^PCRO (PID_GPIOCOM3, 0x4cc, 0x00001000)
^^PCRO (PID_GPIOCOM3, 0x4d4, 0x00001000)
^^PCRO (PID_GPIOCOM3, 0x4dc, 0x00001000)
^^PCRO (PID_GPIOCOM3, 0x4e4, 0x00001000)
^^PCRO (PID_GPIOCOM3, 0x4f4, 0x00001000)
} }
Device (CARD) Device (CARD)