sb/intel/i82371eb: Support reconfiguring GPO22/23
XOE# and XDIR# can be used as GPOs 23/22 if X-Bus functionality is not required. Turns out asus/p2b-ls is using them to control termination for the onboard SCSI buses. Add support to allow this reconfiguration. Change-Id: I2dab6fafbd67a98ed1cac1ffcf9352be4a87c3e9 Signed-off-by: Keith Hui <buurin@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38352 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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@ -28,6 +28,9 @@ struct southbridge_intel_i82371eb_config {
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int ide1_drive1_udma33_enable:1;
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int ide_legacy_enable:1;
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int usb_enable:1;
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int gpo22_enable:1; /* GPO22/GPO23 (1) vs. XDIR#/XOE# (0) */
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int gpo22:1;
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int gpo23:1;
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/* acpi */
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u32 gpo; /* gpio output default */
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u8 lid_polarity;
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@ -28,6 +28,7 @@
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#include <arch/acpigen.h>
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#endif
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#include "i82371eb.h"
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#include "chip.h"
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#if CONFIG(IOAPIC)
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static void enable_intel_82093aa_ioapic(void)
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@ -63,6 +64,7 @@ static void enable_intel_82093aa_ioapic(void)
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static void isa_init(struct device *dev)
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{
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u32 reg32;
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struct southbridge_intel_i82371eb_config *sb = dev->chip_info;
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/* Initialize the real time clock (RTC). */
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cmos_init(0);
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@ -80,7 +82,10 @@ static void isa_init(struct device *dev)
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*/
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reg32 = pci_read_config32(dev, GENCFG);
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reg32 |= ISA; /* Select ISA, not EIO. */
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pci_write_config16(dev, GENCFG, reg32);
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/* Some boards use GPO22/23. Select it if configured. */
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reg32 = ONOFF(sb->gpo22_enable, reg32, GPO2223);
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pci_write_config32(dev, GENCFG, reg32);
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/* Initialize ISA DMA. */
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isa_dma_init();
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