sb/intel/i82371eb: Support reconfiguring GPO22/23

XOE# and XDIR# can be used as GPOs 23/22 if X-Bus functionality is not
required. Turns out asus/p2b-ls is using them to control termination
for the onboard SCSI buses. Add support to allow this reconfiguration.

Change-Id: I2dab6fafbd67a98ed1cac1ffcf9352be4a87c3e9
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38352
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Keith Hui 2020-01-11 03:49:17 -05:00 committed by Patrick Georgi
parent 7af59f709a
commit ce62238998
2 changed files with 9 additions and 1 deletions

View File

@ -28,6 +28,9 @@ struct southbridge_intel_i82371eb_config {
int ide1_drive1_udma33_enable:1;
int ide_legacy_enable:1;
int usb_enable:1;
int gpo22_enable:1; /* GPO22/GPO23 (1) vs. XDIR#/XOE# (0) */
int gpo22:1;
int gpo23:1;
/* acpi */
u32 gpo; /* gpio output default */
u8 lid_polarity;

View File

@ -28,6 +28,7 @@
#include <arch/acpigen.h>
#endif
#include "i82371eb.h"
#include "chip.h"
#if CONFIG(IOAPIC)
static void enable_intel_82093aa_ioapic(void)
@ -63,6 +64,7 @@ static void enable_intel_82093aa_ioapic(void)
static void isa_init(struct device *dev)
{
u32 reg32;
struct southbridge_intel_i82371eb_config *sb = dev->chip_info;
/* Initialize the real time clock (RTC). */
cmos_init(0);
@ -80,7 +82,10 @@ static void isa_init(struct device *dev)
*/
reg32 = pci_read_config32(dev, GENCFG);
reg32 |= ISA; /* Select ISA, not EIO. */
pci_write_config16(dev, GENCFG, reg32);
/* Some boards use GPO22/23. Select it if configured. */
reg32 = ONOFF(sb->gpo22_enable, reg32, GPO2223);
pci_write_config32(dev, GENCFG, reg32);
/* Initialize ISA DMA. */
isa_dma_init();