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soc/intel/jasperlake: Use SBI msg to disable HECI1 

Select HECI_DISABLE_USING_SMM config for Jasper Lake to disable HECI1
device using the SBI msg in SMM.

BUG=none
TEST=None

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I3e8568750ec941fc8b8e7407bad027f7175953c7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61456
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Subrata Banik 2022-01-28 23:31:20 +05:30
parent d6dbd9338c
commit ce70f0b699
2 changed files with 2 additions and 2 deletions
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2
src/soc/intel/jasperlake/Kconfig
View File

@ -64,7 +64,7 @@ config CPU_SPECIFIC_OPTIONS
select UDELAY_TSC select UDELAY_TSC
select UDK_202005_BINDING select UDK_202005_BINDING
select DISPLAY_FSP_VERSION_INFO_2 select DISPLAY_FSP_VERSION_INFO_2
select HECI_DISABLE_USING_SMM select HECI_DISABLE_USING_SMM if DISABLE_HECI1_AT_PRE_BOOT
config DCACHE_RAM_BASE config DCACHE_RAM_BASE
default 0xfef00000 default 0xfef00000

2
src/soc/intel/jasperlake/smihandler.c
View File

@ -16,7 +16,7 @@
*/ */
void smihandler_soc_at_finalize(void) void smihandler_soc_at_finalize(void)
{ {
if (CONFIG(DISABLE_HECI1_AT_PRE_BOOT) && CONFIG(HECI_DISABLE_USING_SMM)) if (CONFIG(DISABLE_HECI1_AT_PRE_BOOT))
heci1_disable(); heci1_disable();
} }