mb/intel/shadowmountain: Enable SaGv support

Signed-off-by: V Sowmya <v.sowmya@intel.com>
Change-Id: I15203920546363466eef567136821b59dda763b0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54648
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
V Sowmya 2021-05-19 09:43:34 +05:30 committed by Felix Held
parent e3a21bb749
commit ce710ccb47
1 changed files with 1 additions and 2 deletions

View File

@ -22,9 +22,8 @@ chip soc/intel/alderlake
# Enable CNVi Bluetooth
register "CnviBtCore" = "true"
# FSP configuration
register "SaGv" = "SaGv_Disabled"
register "SaGv" = "SaGv_Enabled"
# S0ix enable
register "s0ix_enable" = "1"