reclone ts5300 from digitallogic sc520 board
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1997 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer
parent
0c6c07348f
commit
ce8cba4d04
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@ -2,8 +2,10 @@
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## Compute the location and size of where this firmware image
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## (linuxBIOS plus bootloader) will live in the boot rom chip.
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##
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default ROM_SIZE = 512 * 1024
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default FALLBACK_SIZE = 0x10000
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if USE_FALLBACK_IMAGE
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default ROM_SECTION_SIZE = FALLBACK_SIZE
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default ROM_SECTION_SIZE = 64 * 1024 # FALLBACK_SIZE
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default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
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else
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default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
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@ -14,8 +16,8 @@ end
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## Compute the start location and size size of
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## The linuxBIOS bootloader.
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##
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default CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
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default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
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default CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
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##
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## Compute where this copy of linuxBIOS will start in the boot rom
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@ -29,7 +31,7 @@ default _ROMBASE = ( CONFIG_ROM_STREAM_START + PAYLOAD_SIZE )
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## XIP_ROM_SIZE must be a power of 2.
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## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
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##
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default XIP_ROM_SIZE=65536
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default XIP_ROM_SIZE=32*1024
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default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
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##
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@ -44,7 +46,7 @@ arch i386 end
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driver mainboard.o
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if HAVE_PIRQ_TABLE object irq_tables.o end
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#object reset.o
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object reset.o
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##
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## Romcc output
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@ -61,11 +63,11 @@ end
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makerule ./auto.E
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depends "$(MAINBOARD)/auto.c option_table.h ./romcc"
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action "./romcc -E -mcpu=c3 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
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action "./romcc -E -mcpu=i386 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
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end
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makerule ./auto.inc
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depends "$(MAINBOARD)/auto.c option_table.h ./romcc"
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action "./romcc -mcpu=c3 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
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action "./romcc -mcpu=i386 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
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end
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##
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@ -114,9 +116,7 @@ end
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## Setup RAM
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##
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mainboardinit cpu/x86/fpu/enable_fpu.inc
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mainboardinit cpu/x86/mmx/enable_mmx.inc
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mainboardinit ./auto.inc
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mainboardinit cpu/x86/mmx/disable_mmx.inc
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##
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## Include the secondary Configuration files
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@ -124,19 +124,11 @@ mainboardinit cpu/x86/mmx/disable_mmx.inc
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dir /pc80
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config chip.h
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chip northbridge/amd/sc520
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device pci_domain 0 on
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device pci 0.0 on
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#chip southbridge/amd/sc520
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# register "enable_usb" = "0"
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# register "enable_native_ide" = "1"
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# register "enable_com_ports" = "1"
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# register "enable_keyboard" = "0"
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# register "enable_nvram" = "1"
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# end
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end
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chip cpu/amd/sc520
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end
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end
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chip cpu/amd/sc520
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device pci_domain 0 on
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device pci 0.0 on end
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device pci 1.0 on end
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# register "com1" = "{1}"
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# register "com1" = "{1, 0, 0x3f8, 4}"
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end
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end
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@ -0,0 +1,151 @@
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#define ASSEMBLY 1
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#define ASM_CONSOLE_LOGLEVEL 8
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#include <stdint.h>
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#include <device/pci_def.h>
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#include <arch/io.h>
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#include <device/pnp_def.h>
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#include <arch/romcc_io.h>
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#include <arch/hlt.h>
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#include "pc80/mc146818rtc_early.c"
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#include "pc80/serial.c"
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#include "arch/i386/lib/console.c"
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#include "ram/ramtest.c"
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#include "cpu/x86/bist.h"
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//#include "lib/delay.c"
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#include "cpu/amd/sc520/raminit.c"
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struct mem_controller {
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int i;
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};
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static void hard_reset(void)
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{
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}
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static void memreset_setup(void)
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{
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}
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static void memreset(int controllers, const struct mem_controller *ctrl)
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{
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}
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static inline void activate_spd_rom(const struct mem_controller *ctrl)
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{
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/* nothing to do */
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}
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static inline int spd_read_byte(unsigned device, unsigned address)
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{
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// return smbus_read_byte(device, address);
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}
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//#include "sdram/generic_sdram.c"
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static inline void dumpmem(void){
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int i, j;
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unsigned char *l;
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unsigned char c;
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for(i = 0x4000; i < 0x5000; i += 16) {
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print_err_hex32(i); print_err(":");
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for(j = 0; j < 16; j++) {
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l = (unsigned char *)i + j;
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c = *l;
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print_err_hex8(c);
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print_err(" ");
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}
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print_err("\r\n");
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}
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}
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static void main(unsigned long bist)
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{
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volatile int i;
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for(i = 0; i < 100; i++)
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;
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setupsc520();
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uart_init();
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console_init();
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for(i = 0; i < 100; i++)
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print_err("fill usart\r\n");
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// while(1)
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print_err("HI THERE!\r\n");
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// sizemem();
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staticmem();
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print_err("c60 is "); print_err_hex16(*(unsigned short *)0xfffefc60);
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print_err("\n");
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// while(1)
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print_err("STATIC MEM DONE\r\n");
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outb(0xee, 0x80);
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print_err("loop forever ...\n");
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#if 0
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/* clear memory 1meg */
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__asm__ volatile(
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"1: \n\t"
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"movl %0, %%fs:(%1)\n\t"
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"addl $4,%1\n\t"
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"subl $4,%2\n\t"
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"jnz 1b\n\t"
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:
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: "a" (0), "D" (0), "c" (1024*1024)
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);
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#endif
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#if 0
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dump_pci_devices();
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#endif
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#if 0
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dump_pci_device(PCI_DEV(0, 0, 0));
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#endif
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#if 0
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print_err("RAM CHECK!\r\n");
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// Check 16MB of memory @ 0
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ram_check(0x00000000, 0x01000000);
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#endif
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#if 0
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print_err("RAM CHECK for 32 MB!\r\n");
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// Check 32MB of memory @ 0
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ram_check(0x00000000, 0x02000000);
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#endif
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#if 0
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{
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volatile unsigned char *src = (unsigned char *) 0x2000000 + 0x70000;
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volatile unsigned char *dst = (unsigned char *) 0x4000;
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for(i = 0; i < 0x10000; i++) {
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/*
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print_err("Set dst "); print_err_hex32((unsigned long) dst);
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print_err(" to "); print_err_hex32(*src); print_err("\r\n");
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*/
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*dst = *src;
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//print_err(" dst is now "); print_err_hex32(*dst); print_err("\r\n");
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dst++, src++;
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outb((unsigned char)i, 0x80);
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}
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}
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dumpmem();
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outb(0, 0x80);
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print_err("loop forever\r\n");
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outb(0xdd, 0x80);
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__asm__ volatile(
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"movl %0, %%edi\n\t"
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"jmp *%%edi\n\t"
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:
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: "a" (0x4000)
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);
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print_err("FUCK\r\n");
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while(1);
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#endif
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}
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@ -1,5 +1,5 @@
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extern struct chip_operations mainboard_technologic_ts5300_control;
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extern struct chip_operations mainboard_technologic_ts5300_ops;
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struct mainboard_technologic_ts5300_config {
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int nothing;
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};
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@ -5,7 +5,7 @@
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#include <device/pci_ops.h>
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#include "chip.h"
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struct chip_operations mainboard_technologic_ts5300_control = {
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struct chip_operations mainboard_technologic_ts5300_ops = {
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CHIP_NAME("Technologic Systems TS5300 mainboard ")
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};
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