oops. this is weird. CAR addresses should be specified in the socket and not in

the board. I thought we did this ages ago.

Also push CAR BASE further down so it won't conflict with a 32mbit flash part.

Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6299 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer 2011-01-27 01:11:20 +00:00 committed by Stefan Reinauer
parent 33ee3ee6b4
commit ce952652a1
7 changed files with 20 additions and 29 deletions

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@ -12,7 +12,7 @@ config SOCKET_SPECIFIC_OPTIONS # dummy
config DCACHE_RAM_BASE config DCACHE_RAM_BASE
hex hex
default 0xffdf8000 default 0xffaf8000
config DCACHE_RAM_SIZE config DCACHE_RAM_SIZE
hex hex

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@ -1,3 +1,22 @@
config CPU_INTEL_SOCKET_MFCPGA478 config CPU_INTEL_SOCKET_MFCPGA478
bool bool
if CPU_INTEL_SOCKET_MFCPGA478
config SOCKET_SPECIFIC_OPTIONS # dummy
def_bool y
select CPU_INTEL_CORE
select CPU_INTEL_CORE2
select MMX
select SSE
select CACHE_AS_RAM select CACHE_AS_RAM
config DCACHE_RAM_BASE
hex
default 0xffaf8000
config DCACHE_RAM_SIZE
hex
default 0x8000
endif

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@ -21,7 +21,6 @@ if BOARD_GETAC_P470
config BOARD_SPECIFIC_OPTIONS # dummy config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y def_bool y
select ARCH_X86 select ARCH_X86
select CPU_INTEL_CORE
select CPU_INTEL_SOCKET_MFCPGA478 select CPU_INTEL_SOCKET_MFCPGA478
select NORTHBRIDGE_INTEL_I945GM select NORTHBRIDGE_INTEL_I945GM
select SOUTHBRIDGE_INTEL_I82801GX select SOUTHBRIDGE_INTEL_I82801GX
@ -48,14 +47,6 @@ config MAINBOARD_DIR
string string
default getac/p470 default getac/p470
config DCACHE_RAM_BASE
hex
default 0xffdf8000
config DCACHE_RAM_SIZE
hex
default 0x8000
config MAINBOARD_PART_NUMBER config MAINBOARD_PART_NUMBER
string string
default "P470" default "P470"

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@ -3,7 +3,6 @@ if BOARD_IBASE_MB899
config BOARD_SPECIFIC_OPTIONS # dummy config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y def_bool y
select ARCH_X86 select ARCH_X86
select CPU_INTEL_CORE
select CPU_INTEL_SOCKET_MFCPGA478 select CPU_INTEL_SOCKET_MFCPGA478
select NORTHBRIDGE_INTEL_I945GM select NORTHBRIDGE_INTEL_I945GM
select SOUTHBRIDGE_INTEL_I82801GX select SOUTHBRIDGE_INTEL_I82801GX

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@ -4,7 +4,6 @@ if BOARD_IWAVE_RAINBOW_G6
config BOARD_SPECIFIC_OPTIONS # dummy config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y def_bool y
select ARCH_X86 select ARCH_X86
select CPU_INTEL_CORE # FIXME
select CPU_INTEL_SOCKET_441 select CPU_INTEL_SOCKET_441
select NORTHBRIDGE_INTEL_SCH select NORTHBRIDGE_INTEL_SCH
select SOUTHBRIDGE_INTEL_SCH select SOUTHBRIDGE_INTEL_SCH

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@ -3,7 +3,6 @@ if BOARD_KONTRON_986LCD_M
config BOARD_SPECIFIC_OPTIONS # dummy config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y def_bool y
select ARCH_X86 select ARCH_X86
select CPU_INTEL_CORE
select CPU_INTEL_SOCKET_MFCPGA478 select CPU_INTEL_SOCKET_MFCPGA478
select NORTHBRIDGE_INTEL_I945GM select NORTHBRIDGE_INTEL_I945GM
select SOUTHBRIDGE_INTEL_I82801GX select SOUTHBRIDGE_INTEL_I82801GX
@ -26,14 +25,6 @@ config MAINBOARD_DIR
string string
default kontron/986lcd-m default kontron/986lcd-m
config DCACHE_RAM_BASE
hex
default 0xffdf8000
config DCACHE_RAM_SIZE
hex
default 0x8000
config MAINBOARD_PART_NUMBER config MAINBOARD_PART_NUMBER
string string
default "986LCD-M" default "986LCD-M"

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@ -25,14 +25,6 @@ config MAINBOARD_DIR
string string
default roda/rk886ex default roda/rk886ex
config DCACHE_RAM_BASE
hex
default 0xffdf8000
config DCACHE_RAM_SIZE
hex
default 0x8000
config MAINBOARD_PART_NUMBER config MAINBOARD_PART_NUMBER
string string
default "RK886EX" default "RK886EX"