cpu/x86/lapic: Unconditionally use CPUID leaf 0xb if available

Even when we're not in X2APIC mode, the information in CPUID
leaf 0xb will be valid if that leaf is implemented on the CPU.

Change-Id: I0f1f46fe5091ebeab6dfb4c7e151150cf495d0cb
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58386
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

src/cpu/x86/smm/smm_stub.S

@@ -101,30 +101,25 @@ smm_trampoline32:
 	 * the OS can manipulate the APIC id use the non-changing cpuid result
 	 * for APIC id (eax). A table is used to handle a discontiguous
 	 * APIC id space.  */
-apic_id:
-	mov	$LAPIC_BASE_MSR, %ecx
-	rdmsr
-	and	$LAPIC_BASE_X2APIC_ENABLED, %eax
-	cmp	$LAPIC_BASE_X2APIC_ENABLED, %eax
-	jne	xapic
 
-x2apic:
+	mov	$0, %eax
+	cpuid
+	cmp	$0xb, %eax
+	jc	1f
 	mov	$0xb, %eax
 	mov	$0, %ecx
 	cpuid
 	mov	%edx, %eax
-	jmp	apicid_end
-
-xapic:
+	jmp	2f
+1:
 	mov	$1, %eax
 	cpuid
 	mov	%ebx, %eax
 	shr	$24, %eax
+2:
 
-apicid_end:
 	mov	$(apic_to_cpu_num), %ebx
 	xor	%ecx, %ecx
-
 1:
 	cmp	(%ebx, %ecx, 2), %ax
 	je	1f

src/include/cpu/x86/lapic.h

@@ -126,7 +126,7 @@ static __always_inline int lapic_busy(void)
 static __always_inline unsigned int initial_lapicid(void)
 {
 	uint32_t lapicid;
-	if (is_x2apic_mode() && cpuid_get_max_func() >= 0xb)
+	if (cpuid_get_max_func() >= 0xb)
 		lapicid = cpuid_ext(0xb, 0).edx;
 	else
 		lapicid = cpuid_ebx(1) >> 24;