From ceaf9d116949da68aa9c2ed658d28b8b7f34212b Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Sun, 5 Jun 2022 19:33:33 +0530 Subject: [PATCH] soc/intel/alderlake: Allow possible options for MP Init This patch creates choice that lists all possible options to perform MP Init as below: 1. USE_FSP_MP_INIT: Allow coreboot to bring APs from reset and FSP runs feature programming based and selects MP_SERVICES_PPI_V2 config. 2. USE_COREBOOT_MP_INIT: Allow coreboot to perform MP Init (both AP init and feature programming) using native implementation. Additionally, selects required RELOAD_MICROCODE_PATCH when coreboot is expected to run MP Init. Refactor SoC code to allow required FSP UPD override based on selected MP Init option. BUG=b:233199592 TEST=Build and boot google/taeko to ChromeOS. Signed-off-by: Subrata Banik Change-Id: I20adc1935890c4c6bcd11fd086838f15d0723932 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64977 Reviewed-by: Angel Pons Reviewed-by: Lean Sheng Tan Tested-by: build bot (Jenkins) --- src/soc/intel/alderlake/Kconfig | 19 ++++++++++++++++++- src/soc/intel/alderlake/fsp_params.c | 12 ++++++++++-- 2 files changed, 28 insertions(+), 3 deletions(-) diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig index 86366bfa2d..58656df8f7 100644 --- a/src/soc/intel/alderlake/Kconfig +++ b/src/soc/intel/alderlake/Kconfig @@ -67,7 +67,6 @@ config CPU_SPECIFIC_OPTIONS select INTEL_GMA_ADD_VBT if RUN_FSP_GOP select INTEL_GMA_OPREGION_2_1 select INTEL_TME - select MP_SERVICES_PPI_V2 select MRC_SETTINGS_PROTECT select PARALLEL_MP_AP_WORK select MICROCODE_BLOB_UNDISCLOSED @@ -397,6 +396,24 @@ config ACPI_ADL_IPU_ES_SUPPORT help Enables ACPI entry to provide silicon type information to IPU kernel driver. +choice + prompt "Multiprocessor (MP) Initialization configuration to use" + default USE_FSP_MP_INIT + +config USE_FSP_MP_INIT + bool "Use FSP MP init" + select MP_SERVICES_PPI_V2 + help + Upon selection, coreboot brings APs from reset and the FSP runs feature programming. + +config USE_COREBOOT_MP_INIT + bool "Use coreboot MP init" + select RELOAD_MICROCODE_PATCH + help + Upon selection, coreboot performs MP Init. + +endchoice + if STITCH_ME_BIN config CSE_BPDT_VERSION diff --git a/src/soc/intel/alderlake/fsp_params.c b/src/soc/intel/alderlake/fsp_params.c index 36fd50de17..05f3997287 100644 --- a/src/soc/intel/alderlake/fsp_params.c +++ b/src/soc/intel/alderlake/fsp_params.c @@ -404,9 +404,17 @@ static void fill_fsps_cpu_params(FSP_S_CONFIG *s_cfg, } } - /* Use coreboot MP PPI services if Kconfig is enabled */ - if (CONFIG(USE_INTEL_FSP_TO_CALL_COREBOOT_PUBLISH_MP_PPI)) + if (CONFIG(USE_FSP_MP_INIT)) { + /* + * Use FSP running MP PPI services to perform CPU feature programming + * if Kconfig is enabled + */ s_cfg->CpuMpPpi = (uintptr_t) mp_fill_ppi_services_data(); + } else { + /* Use coreboot native driver to perform MP init by default */ + s_cfg->CpuMpPpi = (uintptr_t)NULL; + s_cfg->SkipMpInit = !CONFIG(USE_INTEL_FSP_MP_INIT); + } } static void fill_fsps_igd_params(FSP_S_CONFIG *s_cfg,