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mb/google/guybrush: Configure UART0 gpio in early stage 

BUG=b:180721208
TEST=builds

Signed-off-by: Mathew King <mathewk@chromium.org>
Change-Id: I8aa54acf1fa9295b27c33a0066432665e6e3755c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51540
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
This commit is contained in:
Mathew King 2021-03-16 12:49:26 -06:00 committed by Felix Held
parent 33f3c53504
commit cec52453b7
1 changed files with 4 additions and 0 deletions
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4
src/mainboard/google/guybrush/variants/baseboard/gpio.c
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@ -166,6 +166,10 @@ static const struct soc_amd_gpio early_gpio_table[] = {
PAD_NF(GPIO_107, SPI2_HOLD_L_ESPI2_D3, PULL_NONE), PAD_NF(GPIO_107, SPI2_HOLD_L_ESPI2_D3, PULL_NONE),
/* ESPI_ALERT_L */ /* ESPI_ALERT_L */
PAD_NF(GPIO_108, ESPI_ALERT_D1, PULL_NONE), PAD_NF(GPIO_108, ESPI_ALERT_D1, PULL_NONE),
/* UART0_RXD */
PAD_NF(GPIO_141, UART0_RXD, PULL_NONE),
/* UART0_TXD */
PAD_NF(GPIO_143, UART0_TXD, PULL_NONE),
}; };
/* GPIO configuration for sleep */ /* GPIO configuration for sleep */