mb/google/guybrush: Configure UART0 gpio in early stage
BUG=b:180721208 TEST=builds Signed-off-by: Mathew King <mathewk@chromium.org> Change-Id: I8aa54acf1fa9295b27c33a0066432665e6e3755c Reviewed-on: https://review.coreboot.org/c/coreboot/+/51540 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
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@ -166,6 +166,10 @@ static const struct soc_amd_gpio early_gpio_table[] = {
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PAD_NF(GPIO_107, SPI2_HOLD_L_ESPI2_D3, PULL_NONE),
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/* ESPI_ALERT_L */
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PAD_NF(GPIO_108, ESPI_ALERT_D1, PULL_NONE),
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/* UART0_RXD */
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PAD_NF(GPIO_141, UART0_RXD, PULL_NONE),
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/* UART0_TXD */
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PAD_NF(GPIO_143, UART0_TXD, PULL_NONE),
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};
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/* GPIO configuration for sleep */
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