Revert "soc/intel/cannonlake: Add dummy ACPI DSDT table"
This reverts commit 6c0f3c7ee1
.
Reason for revert:
Broke master builds, this was submitted out-of-order, some
of the dependencies have not passed review with +2 yet.
Change-Id: Ib7bcb1b98623d16e074caeca839a936d71ded709
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/21414
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
This commit is contained in:
parent
3fd259c91d
commit
ced3a0c249
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@ -4,7 +4,6 @@ config BOARD_SPECIFIC_OPTIONS
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def_bool y
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select BOARD_ROMSIZE_KB_16384
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select SOC_INTEL_CANNONLAKE
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select HAVE_ACPI_TABLES
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select GENERIC_SPD_BIN
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config MAINBOARD_DIR
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@ -1,37 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2007-2009 coresystems GmbH
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* Copyright (C) 2015 Google Inc.
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* Copyright (C) 2017 Intel Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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DefinitionBlock(
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"dsdt.aml",
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"DSDT",
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0x05, // DSDT revision: ACPI v5.0
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"COREv4", // OEM id
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"COREBOOT", // OEM table id
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0x20110725 // OEM revision
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)
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{
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// global NVS and variables
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#include <soc/intel/cannonlake/acpi/globalnvs.asl>
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Scope (\_SB) {
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}
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#if IS_ENABLED(CONFIG_CHROMEOS)
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// Chrome OS specific
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#include <vendorcode/google/chromeos/acpi/chromeos.asl>
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#endif
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}
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