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mb/intel/adlrvp: Update HPD1/2 GPIO as per latest schematics 

HPD_1: A19 -> E14
HPD_2: A20 -> A18

Change-Id: Idf3c8f4931bf8364bb9216a9369df7e05dcde047
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47683
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Subrata Banik 2020-11-17 23:53:50 +05:30
parent 91797c1416
commit ceee6d87ca
1 changed files with 3 additions and 3 deletions
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6
src/mainboard/intel/adlrvp/gpio.c
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@ -277,9 +277,9 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_A21, NONE, DEEP, NF2), PAD_CFG_NF(GPP_A21, NONE, DEEP, NF2),
PAD_CFG_NF(GPP_A22, NONE, DEEP, NF2), PAD_CFG_NF(GPP_A22, NONE, DEEP, NF2),
/* HPD_1 (A19) and HPD_2 (A20) pins */ /* HPD_1 (E14) and HPD_2 (A18) pins */
PAD_CFG_NF(GPP_A19, NONE, DEEP, NF1), PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_A20, NONE, DEEP, NF1), PAD_CFG_NF(GPP_A18, NONE, DEEP, NF1),
/* IMGCLKOUT */ /* IMGCLKOUT */
PAD_CFG_NF(GPP_D4, NONE, DEEP, NF1), PAD_CFG_NF(GPP_D4, NONE, DEEP, NF1),