soc/amd/sabrina/Kconfig: remove SOC_AMD_COMMON_BLOCK_PCI_MMCONF TODO
Sabrina uses the same MMIO_CONF_BASE MSR as the previous AMD CPUs to configure the PCI MMCONF base address. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I7e3064bab5ca1e277b04f9aae98f9adabce75399 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61681 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
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@ -59,7 +59,7 @@ config SOC_SPECIFIC_OPTIONS
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select SOC_AMD_COMMON_BLOCK_MCAX # TODO: Check if this is still correct
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select SOC_AMD_COMMON_BLOCK_NONCAR # TODO: Check if this is still correct
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select SOC_AMD_COMMON_BLOCK_PCI # TODO: Check if this is still correct
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select SOC_AMD_COMMON_BLOCK_PCI_MMCONF # TODO: Check if this is still correct
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select SOC_AMD_COMMON_BLOCK_PCI_MMCONF
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select SOC_AMD_COMMON_BLOCK_PCIE_GPP_DRIVER # TODO: Check if this is still correct
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select SOC_AMD_COMMON_BLOCK_PM # TODO: Check if this is still correct
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select SOC_AMD_COMMON_BLOCK_PM_CHIPSET_STATE_SAVE # TODO: Check if this is still correct
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