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mb/siemens/mc_ehl2: Set PCH TSN link speed to 1 Gbps in devicetree 

TSN runs in SGMII mode on this mainboard. This requires setting the link
speed to 1 Gbps.

Change-Id: I9f1da971b4de5671d6d38be6dbc50edbbe20d157
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64033
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
This commit is contained in:
Mario Scheithauer 2022-05-03 12:32:17 +02:00 committed by Felix Held
parent 6438084eab
commit cf0236972d
1 changed files with 1 additions and 1 deletions
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src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb
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@ -101,7 +101,7 @@ chip soc/intel/elkhartlake
}"
# TSN GBE related UPDs
register "PchTsnGbeLinkSpeed" = "Tsn_2_5_Gbps"
register "PchTsnGbeLinkSpeed" = "Tsn_1_Gbps"
register "PchTsnGbeSgmiiEnable" = "1"
register "PseTsnGbeSgmiiEnable[0]" = "1"
register "PseTsnGbeSgmiiEnable[1]" = "1"