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src/superio: Add space around operators 

Change-Id: Ibeab5e7fe0a9005e96934b3b43cfb247ef2e2340
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16615
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
Elyes HAOUAS 2016-09-16 20:32:00 +02:00 committed by Patrick Georgi
parent a0fed37044
commit cf13950736
4 changed files with 11 additions and 11 deletions
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4
src/superio/fintek/f71869ad/f71869ad_hwm.c
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@ -82,11 +82,11 @@ void f71869ad_hwm_init(struct device *dev)
pnp_write_index(port, HWM_FAN1_TEMP_MAP_SEL, conf->hwm_fan1_temp_map_sel);
/* set FAN_PROG_SEL = 1 */
pnp_write_index(port, HWM_FAN_FAULT_TIME_REG, 0x8a);
/* FAN1_BASE_TEMP (Tb) set when FAN_PROG_SEL=1, p.64-65 */
/* FAN1_BASE_TEMP (Tb) set when FAN_PROG_SEL = 1, p.64-65 */
pnp_write_index(port, HWM_FAN_TYPE_SEL_REG, conf->hwm_fan_type_sel_reg);
/* set TFAN1_ADJ_SEL (Ta) p.67 to use CR7Ah p.61 */
pnp_write_index(port, HWM_FAN_MODE_SEL_REG, conf->hwm_fan_mode_sel_reg);
/* TFAN1_ADJ_{UP,DOWN}_RATE (Ct=1/4 up & down) in 0x95 when FAN_PROG_SEL =
/* TFAN1_ADJ_{UP,DOWN}_RATE (Ct = 1/4 up & down) in 0x95 when FAN_PROG_SEL =
1, p.88 */
pnp_write_index(port, HWM_FAN1_TEMP_ADJ_RATE_REG, conf->hwm_fan1_temp_adj_rate_reg);
/* set FAN_PROG_SEL = 0 */

8
src/superio/fintek/f71869ad/f71869ad_multifunc.c
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@ -36,19 +36,19 @@ void f71869ad_multifunc_init(struct device *dev)
pnp_write_config(dev, MULTI_FUNC_SEL_REG1,
conf->multi_function_register_1);
/* multi-func select reg2 (CLK_TUNE_EN=0) */
/* multi-func select reg2 (CLK_TUNE_EN = 0) */
pnp_write_config(dev, MULTI_FUNC_SEL_REG2,
conf->multi_function_register_2);
/* multi-func select reg3 (CLK_TUNE_EN=0) */
/* multi-func select reg3 (CLK_TUNE_EN = 0) */
pnp_write_config(dev, MULTI_FUNC_SEL_REG3,
conf->multi_function_register_3);
/* multi-func select reg4 (CLK_TUNE_EN=0) */
/* multi-func select reg4 (CLK_TUNE_EN = 0) */
pnp_write_config(dev, MULTI_FUNC_SEL_REG4,
conf->multi_function_register_4);
/* multi-func select reg5 (CLK_TUNE_EN=0) */
/* multi-func select reg5 (CLK_TUNE_EN = 0) */
pnp_write_config(dev, MULTI_FUNC_SEL_REG5,
conf->multi_function_register_5);

6
src/superio/smsc/lpc47n207/early_serial.c
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@ -57,7 +57,7 @@ void try_enabling_LPC47N207_uart(void)
/* enable CONFIG mode */
outb(CONFIG_ENABLE, lpc_port);
reg_value=inb(lpc_port);
reg_value = inb(lpc_port);
if (reg_value != CONFIG_ENABLE) {
continue; /* There is no LPC device at this address */
}
@ -68,12 +68,12 @@ void try_enabling_LPC47N207_uart(void)
* match.
*/
outb(0x12, lpc_port);
reg_value=inb(lpc_port + 1);
reg_value = inb(lpc_port + 1);
if (reg_value != (lpc_port & 0xff))
break;
outb(0x13, lpc_port);
reg_value=inb(lpc_port + 1);
reg_value = inb(lpc_port + 1);
if (reg_value != (lpc_port >> 8))
break;

4
src/superio/smsc/smscsuperio/superio.c
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@ -236,8 +236,8 @@ static void enable_dev(struct device *dev)
/* TODO: Error handling? */
printk(BIOS_INFO, "Found SMSC Super I/O (ID=0x%02x, "
"rev=0x%02x)\n", superio_id, superio_rev);
printk(BIOS_INFO, "Found SMSC Super I/O (ID = 0x%02x, "
"rev = 0x%02x)\n", superio_id, superio_rev);
first_time = 0;
if (superio_id == LPC47M172) {