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mb/glkrvp: Set PNP config to PNP_PERF_POWER 

This patch sets the PNP config value to PNP_PERF_POWER.
The config values for soc can be found in chip.h

TEST = Built and booted glkrvp, verified warm and cold
reboot and suspend resume.

Change-Id: Ia390c0fafe2de64bd9e4ca44e5ed5d904663ae3c
Signed-off-by: Shaunak Saha <shaunak.saha@intel.com>
Reviewed-on: https://review.coreboot.org/25309
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Shaunak Saha 2018-03-21 07:39:40 -07:00 committed by Aaron Durbin
parent d18f42ab6f
commit cf1ba95fa4
1 changed files with 2 additions and 0 deletions
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src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb
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@ -98,6 +98,8 @@ chip soc/intel/apollolake
# 0x08000000 - 128MiB # 0x08000000 - 128MiB
register "PrmrrSize" = "128 * MiB" register "PrmrrSize" = "128 * MiB"
register "pnp_settings" = "PNP_PERF_POWER"
device domain 0 on device domain 0 on
device pci 00.0 on end # - Host Bridge device pci 00.0 on end # - Host Bridge
device pci 00.1 on end # - DPTF device pci 00.1 on end # - DPTF