GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

southbridge/hudson: Remove redundant definitions of ACPI IO ports 

The ACPI IO ports were defined twice, and used inconsistently. Only
keep one of the definitions for consistency.

Change-Id: If5744f9375fdaa97ceb9ba03dca8aa825eecf159
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/5558
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
Alexandru Gagniuc 2014-04-20 13:24:42 -05:00
parent 991e951461
commit cf1f9b6a5b
3 changed files with 7 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/southbridge/amd/agesa/hudson/early_setup.c
View File

@ -126,7 +126,7 @@ int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos)
#if CONFIG_HAVE_ACPI_RESUME
int acpi_get_sleep_type(void)
{
u16 tmp = inw(PM1_CNT_BLK_ADDRESS);
u16 tmp = inw(ACPI_PM1_CNT_BLK);
tmp = ((tmp & (7 << 10)) >> 10);
/* printk(BIOS_DEBUG, "SLP_TYP type was %x\n", tmp); */
return (int)tmp;

2
src/southbridge/amd/agesa/hudson/hudson.c
View File

@ -40,7 +40,7 @@
#if CONFIG_HAVE_ACPI_RESUME
int acpi_get_sleep_type(void)
{
u16 tmp = inw(PM1_CNT_BLK_ADDRESS);
u16 tmp = inw(ACPI_PM1_CNT_BLK);
tmp = ((tmp & (7 << 10)) >> 10);
/* printk(BIOS_DEBUG, "SLP_TYP type was %x\n", tmp); */
return (int)tmp;

15
src/southbridge/amd/agesa/hudson/hudson.h
View File

@ -40,16 +40,6 @@
#define ACPI_GPE0_BLK (HUDSON_ACPI_IO_BASE + 0x10) /* 8 bytes */
#define ACPI_CPU_CONTROL (HUDSON_ACPI_IO_BASE + 0x08) /* 6 bytes */
#define REV_HUDSON_A11 0x11
#define REV_HUDSON_A12 0x12
#define PM1_EVT_BLK_ADDRESS 0x800 // AcpiPm1EvtBlkAddr;
#define PM1_CNT_BLK_ADDRESS 0x804 // AcpiPm1CntBlkAddr;
#define PM1_TMR_BLK_ADDRESS 0x808 // AcpiPmTmrBlkAddr;
#define CPU_CNT_BLK_ADDRESS 0x810 // CpuControlBlkAddr;
#define GPE0_BLK_ADDRESS 0x820 // AcpiGpe0BlkAddr;
#define SPIROM_BASE_ADDRESS_REGISTER 0xA0
#define ACPI_SMI_CTL_PORT 0xb2
#define ACPI_SMI_CMD_CST_CONTROL 0xde
#define ACPI_SMI_CMD_PST_CONTROL 0xad
@ -57,6 +47,11 @@
#define ACPI_SMI_CMD_ENABLE 0xef
#define ACPI_SMI_CMD_S4_REQ 0xc0
#define REV_HUDSON_A11 0x11
#define REV_HUDSON_A12 0x12
#define SPIROM_BASE_ADDRESS_REGISTER 0xA0
#ifndef __SMM__
void pm_write8(u8 reg, u8 value);