svn mv src/northbridge/intel/E7520 src/northbridge/intel/e7520

Browse Source

svn mv src/northbridge/intel/E7525 src/northbridge/intel/e7525

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2478 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

...

This commit is contained in:

Uwe Hermann 2006-10-27 11:40:01 +00:00

parent 586470c646

commit cf20187079

26 changed files with 0 additions and 0 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Show Stats Download Patch File Download Diff File Expand all files Collapse all files

0

src/northbridge/intel/E7520/Config.lb → src/northbridge/intel/e7520/Config.lb

Unescape Escape View File

0

src/northbridge/intel/E7520/chip.h → src/northbridge/intel/e7520/chip.h

Unescape Escape View File

0

src/northbridge/intel/E7520/e7520.h → src/northbridge/intel/e7520/e7520.h

Unescape Escape View File

0

src/northbridge/intel/E7520/memory_initialized.c → src/northbridge/intel/e7520/memory_initialized.c

Unescape Escape View File

0

src/northbridge/intel/E7520/northbridge.c → src/northbridge/intel/e7520/northbridge.c

Unescape Escape View File

0

src/northbridge/intel/E7520/northbridge.h → src/northbridge/intel/e7520/northbridge.h

Unescape Escape View File

0

src/northbridge/intel/E7520/pciexp_porta.c → src/northbridge/intel/e7520/pciexp_porta.c

Unescape Escape View File

0

src/northbridge/intel/E7520/pciexp_porta1.c → src/northbridge/intel/e7520/pciexp_porta1.c

Unescape Escape View File

0

src/northbridge/intel/E7520/pciexp_portb.c → src/northbridge/intel/e7520/pciexp_portb.c

Unescape Escape View File

0

src/northbridge/intel/E7520/pciexp_portc.c → src/northbridge/intel/e7520/pciexp_portc.c

Unescape Escape View File

0

src/northbridge/intel/E7520/raminit.c → src/northbridge/intel/e7520/raminit.c

Unescape Escape View File

0

src/northbridge/intel/E7520/raminit.h → src/northbridge/intel/e7520/raminit.h

Unescape Escape View File

0

src/northbridge/intel/E7520/raminit_test.c → src/northbridge/intel/e7520/raminit_test.c

Unescape Escape View File

0

src/northbridge/intel/E7525/Config.lb → src/northbridge/intel/e7525/Config.lb

Unescape Escape View File

0

src/northbridge/intel/E7525/chip.h → src/northbridge/intel/e7525/chip.h

Unescape Escape View File

0

src/northbridge/intel/E7525/e7525.h → src/northbridge/intel/e7525/e7525.h

Unescape Escape View File

0

src/northbridge/intel/E7525/memory_initialized.c → src/northbridge/intel/e7525/memory_initialized.c

Unescape Escape View File

0

src/northbridge/intel/E7525/northbridge.c → src/northbridge/intel/e7525/northbridge.c

Unescape Escape View File

0

src/northbridge/intel/E7525/northbridge.h → src/northbridge/intel/e7525/northbridge.h

Unescape Escape View File

0

src/northbridge/intel/E7525/pciexp_porta.c → src/northbridge/intel/e7525/pciexp_porta.c

Unescape Escape View File

0

src/northbridge/intel/E7525/pciexp_porta1.c → src/northbridge/intel/e7525/pciexp_porta1.c

Unescape Escape View File

0

src/northbridge/intel/E7525/pciexp_portb.c → src/northbridge/intel/e7525/pciexp_portb.c

Unescape Escape View File

0

src/northbridge/intel/E7525/pciexp_portc.c → src/northbridge/intel/e7525/pciexp_portc.c

Unescape Escape View File

0

src/northbridge/intel/E7525/raminit.c → src/northbridge/intel/e7525/raminit.c

Unescape Escape View File

0

src/northbridge/intel/E7525/raminit.h → src/northbridge/intel/e7525/raminit.h

Unescape Escape View File

0

src/northbridge/intel/E7525/raminit_test.c → src/northbridge/intel/e7525/raminit_test.c

Unescape Escape View File