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soc/intel/xeon_sp/cpx: Enable common P2SB 

Use common P2SB driver. This is needed to address a problem when
enumerator does not see p2sb device (since it is hidden) but it
is active and BAR is decoded.

Change-Id: I9cb821a5684f15f1e1486872bf806a6ee3d0676f
Signed-off-by: Andrey Petrov <anpetrov@fb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40920
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Andrey Petrov 2020-04-30 13:36:38 -07:00 committed by Andrey Petrov
parent 15070e7ea8
commit cf270f0d62
1 changed files with 3 additions and 0 deletions
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src/soc/intel/xeon_sp/cpx/Kconfig
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@ -74,4 +74,7 @@ config FSP_TEMP_RAM_SIZE
Refer to Platform FSP integration guide document to know Refer to Platform FSP integration guide document to know
the exact FSP requirement for Heap setup. the exact FSP requirement for Heap setup.
config SOC_INTEL_COMMON_BLOCK_P2SB
def_bool y
endif endif