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northbridge/intel/nehalem/gma.c: Improve code formatting 

Change-Id: Ie7ee547ab34441f93433936334e9881dd7cc0371
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16599
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Elyes HAOUAS 2016-09-13 21:27:22 +02:00 committed by Martin Roth
parent 237916ac0a
commit cf5430fd5c
1 changed files with 13 additions and 15 deletions
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28
src/northbridge/intel/nehalem/gma.c
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@ -261,7 +261,7 @@ u32 map_oprom_vendev(u32 vendev)
{ {
u32 new_vendev = vendev; u32 new_vendev = vendev;
/* none curently. */ /* none curently. */
return new_vendev; return new_vendev;
} }
@ -675,7 +675,7 @@ static void intel_gma_init(const struct northbridge_intel_nehalem_config *info,
write32(mmio + 0x00042004, 0x02000000); write32(mmio + 0x00042004, 0x02000000);
write32(mmio + 0x000fd034, 0x8421ffe0); write32(mmio + 0x000fd034, 0x8421ffe0);
/* Setup GTT. */ /* Setup GTT. */
for (i = 0; i < 0x2000; i++) for (i = 0; i < 0x2000; i++)
{ {
outl((i << 2) | 1, piobase); outl((i << 2) | 1, piobase);
@ -702,7 +702,7 @@ static void intel_gma_init(const struct northbridge_intel_nehalem_config *info,
sizeof(edid_data), &edid); sizeof(edid_data), &edid);
mode = &edid.mode; mode = &edid.mode;
/* Disable screen memory to prevent garbage from appearing. */ /* Disable screen memory to prevent garbage from appearing. */
vga_sr_write(1, vga_sr_read(1) | 0x20); vga_sr_write(1, vga_sr_read(1) | 0x20);
hactive = edid.x_resolution; hactive = edid.x_resolution;
@ -748,17 +748,17 @@ static void intel_gma_init(const struct northbridge_intel_nehalem_config *info,
write32(mmio + LGC_PALETTE(0) + 4 * i, i * 0x010101); write32(mmio + LGC_PALETTE(0) + 4 * i, i * 0x010101);
#endif #endif
/* Find suitable divisors. */ /* Find suitable divisors. */
for (candp1 = 1; candp1 <= 8; candp1++) { for (candp1 = 1; candp1 <= 8; candp1++) {
for (candn = 5; candn <= 10; candn++) { for (candn = 5; candn <= 10; candn++) {
u32 cur_frequency; u32 cur_frequency;
u32 m; /* 77 - 131. */ u32 m; /* 77 - 131. */
u32 denom; /* 35 - 560. */ u32 denom; /* 35 - 560. */
u32 current_delta; u32 current_delta;
denom = candn * candp1 * 7; denom = candn * candp1 * 7;
/* Doesnt overflow for up to /* Doesnt overflow for up to
5000000 kHz = 5 GHz. */ 5000000 kHz = 5 GHz. */
m = (target_frequency * denom + 60000) / 120000; m = (target_frequency * denom + 60000) / 120000;
if (m < 77 || m > 131) if (m < 77 || m > 131)
@ -973,7 +973,7 @@ static void intel_gma_init(const struct northbridge_intel_nehalem_config *info,
write32(mmio + PCH_PP_CONTROL, PANEL_POWER_ON | PANEL_POWER_RESET); write32(mmio + PCH_PP_CONTROL, PANEL_POWER_ON | PANEL_POWER_RESET);
/* Enable screen memory. */ /* Enable screen memory. */
vga_sr_write(1, vga_sr_read(1) & ~0x20); vga_sr_write(1, vga_sr_read(1) & ~0x20);
/* Clear interrupts. */ /* Clear interrupts. */
@ -1027,7 +1027,7 @@ static void gma_func0_init(struct device *dev)
pio_res->base, lfb_res->base); pio_res->base, lfb_res->base);
} }
/* Linux relies on VBT for panel info. */ /* Linux relies on VBT for panel info. */
generate_fake_intel_oprom(&conf->gfx, dev, "$VBT IRONLAKE-MOBILE"); generate_fake_intel_oprom(&conf->gfx, dev, "$VBT IRONLAKE-MOBILE");
#endif #endif
@ -1061,10 +1061,8 @@ static void gma_read_resources(struct device *dev)
return; return;
} }
res->flags |= IORESOURCE_RESERVE | IORESOURCE_FIXED | IORESOURCE_ASSIGNED; res->flags |= IORESOURCE_RESERVE | IORESOURCE_FIXED | IORESOURCE_ASSIGNED;
pci_write_config32(dev, PCI_BASE_ADDRESS_2, pci_write_config32(dev, PCI_BASE_ADDRESS_2, 0xd0000001);
0xd0000001); pci_write_config32(dev, PCI_BASE_ADDRESS_2 + 4, 0);
pci_write_config32(dev, PCI_BASE_ADDRESS_2 + 4,
0);
res->base = (resource_t) 0xd0000000; res->base = (resource_t) 0xd0000000;
res->size = (resource_t) 0x10000000; res->size = (resource_t) 0x10000000;
} }
@ -1105,8 +1103,8 @@ static struct device_operations gma_func0_ops = {
.ops_pci = &gma_pci_ops, .ops_pci = &gma_pci_ops,
}; };
static const unsigned short pci_device_ids[] = static const unsigned short pci_device_ids[] = {
{ 0x0046, 0x0102, 0x0106, 0x010a, 0x0112, 0x0046, 0x0102, 0x0106, 0x010a, 0x0112,
0x0116, 0x0122, 0x0126, 0x0156, 0x0116, 0x0122, 0x0126, 0x0156,
0x0166, 0x0166,
0 0