soc/intel/common/sa: Remove EBDA dependency
Saving cbmem_top across stages is not needed anymore so EBDA should not be used. The guard to cbmem_top_chipset implementation was inappropriate. Change-Id: Ibbb3534b88de4f7b6fc39675a77461265605e56e Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36614 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner
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@ -88,7 +88,7 @@ config CPU_SPECIFIC_OPTIONS
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select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG
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select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG
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select SOC_INTEL_COMMON_BLOCK_CPU
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select SOC_INTEL_COMMON_BLOCK_CPU
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select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT
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select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT
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select SOC_INTEL_COMMON_BLOCK_EBDA
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select SOC_INTEL_COMMON_BLOCK_SA_FSP_TOLUM
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select SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT
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select SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT
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select SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2
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select SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2
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select SOC_INTEL_COMMON_BLOCK_HDA
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select SOC_INTEL_COMMON_BLOCK_HDA
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@ -3,6 +3,12 @@ config SOC_INTEL_COMMON_BLOCK_SA
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help
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help
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Intel Processor common System Agent support
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Intel Processor common System Agent support
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config SOC_INTEL_COMMON_BLOCK_SA_FSP_TOLUM
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bool
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help
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Select this if you want cbmem_top_chipset use the TOLUM returned
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by the FSP HOB.
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config MMCONF_BASE_ADDRESS
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config MMCONF_BASE_ADDRESS
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hex
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hex
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default 0xe0000000
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default 0xe0000000
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@ -6,3 +6,4 @@ ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SA) += systemagent.c
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romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SA) += memmap.c
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romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SA) += memmap.c
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ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SA) += memmap.c
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ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SA) += memmap.c
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postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SA) += memmap.c
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postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SA) += memmap.c
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romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SA_FSP_TOLUM) += cbmem.c
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@ -0,0 +1,23 @@
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/*
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* This file is part of the coreboot project.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <cbmem.h>
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#include <fsp/util.h>
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void *cbmem_top_chipset(void)
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{
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struct range_entry tolum;
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fsp_find_bootloader_tolum(&tolum);
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return (void *)(uintptr_t)range_entry_end(&tolum);
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}
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@ -19,8 +19,6 @@
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#include <console/console.h>
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#include <console/console.h>
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#include <cpu/x86/mtrr.h>
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#include <cpu/x86/mtrr.h>
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#include <cpu/x86/smm.h>
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#include <cpu/x86/smm.h>
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#include <fsp/util.h>
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#include <intelblocks/ebda.h>
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#include <intelblocks/systemagent.h>
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#include <intelblocks/systemagent.h>
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#include <stdlib.h>
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#include <stdlib.h>
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@ -70,31 +68,6 @@ void smm_region(uintptr_t *start, size_t *size)
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*size = sa_get_tseg_size();
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*size = sa_get_tseg_size();
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}
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}
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#if CONFIG(SOC_INTEL_COMMON_BLOCK_EBDA)
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void fill_memmap_ebda(struct ebda_config *cfg)
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{
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struct range_entry tolum;
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fsp_find_bootloader_tolum(&tolum);
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cfg->cbmem_top = range_entry_end(&tolum);
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}
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void cbmem_top_init(void)
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{
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/* Initialize EBDA area */
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initialize_ebda_area();
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}
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void *cbmem_top_chipset(void)
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{
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struct ebda_config ebda_cfg;
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retrieve_ebda_object(&ebda_cfg);
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return (void *)(uintptr_t)ebda_cfg.cbmem_top;
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}
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#endif
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void fill_postcar_frame(struct postcar_frame *pcf)
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void fill_postcar_frame(struct postcar_frame *pcf)
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{
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{
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uintptr_t top_of_ram;
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uintptr_t top_of_ram;
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@ -43,7 +43,7 @@ config CPU_SPECIFIC_OPTIONS
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select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG
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select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG
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select SOC_INTEL_COMMON_BLOCK_CPU
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select SOC_INTEL_COMMON_BLOCK_CPU
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select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT
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select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT
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select SOC_INTEL_COMMON_BLOCK_EBDA
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select SOC_INTEL_COMMON_BLOCK_SA_FSP_TOLUM
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select SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2
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select SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2
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select SOC_INTEL_COMMON_BLOCK_HDA
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select SOC_INTEL_COMMON_BLOCK_HDA
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select SOC_INTEL_COMMON_BLOCK_SA
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select SOC_INTEL_COMMON_BLOCK_SA
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@ -58,7 +58,7 @@ config CPU_SPECIFIC_OPTIONS
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select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG
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select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG
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select SOC_INTEL_COMMON_BLOCK_CPU
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select SOC_INTEL_COMMON_BLOCK_CPU
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select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT
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select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT
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select SOC_INTEL_COMMON_BLOCK_EBDA
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select SOC_INTEL_COMMON_BLOCK_SA_FSP_TOLUM
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select SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT
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select SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT
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select SOC_INTEL_COMMON_BLOCK_GPIO_LEGACY_MACROS
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select SOC_INTEL_COMMON_BLOCK_GPIO_LEGACY_MACROS
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select SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL
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select SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL
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