vendorcode/google/chromeos: Save VPD region into GNVS
Store the memory address of VPD region start and length for the memory mapped RO_VPD and RW_VPD into GNVS so they can be used by ACPI code. BUG=b:123925776 TEST=boot on sarien and verify VPD start/length in GNVS Change-Id: I39073a9d78f5ff60bfe088860c087a5167f05fdf Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://review.coreboot.org/c/31667 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
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@ -32,4 +32,8 @@ VBTA, 32, // 0xd9a - pointer to smbios FWID
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MEHH, 256, // 0xd9e - Management Engine Hash
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MEHH, 256, // 0xd9e - Management Engine Hash
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RMOB, 32, // 0xdbe - RAM oops base address
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RMOB, 32, // 0xdbe - RAM oops base address
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RMOL, 32, // 0xdc2 - RAM oops length
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RMOL, 32, // 0xdc2 - RAM oops length
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// 0xdc6
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ROVP, 32, // 0xdc6 - pointer to RO_VPD
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ROVL, 32, // 0xdca - size of RO_VPD
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RWVP, 32, // 0xdce - pointer to RW_VPD
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RWVL, 32, // 0xdd2 - size of RW_VPD
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// 0xdd6
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@ -20,6 +20,7 @@
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#include <cbmem.h>
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#include <cbmem.h>
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#include <console/console.h>
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#include <console/console.h>
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#include <elog.h>
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#include <elog.h>
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#include <fmap.h>
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#include <security/vboot/vbnv.h>
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#include <security/vboot/vbnv.h>
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#include <security/vboot/vboot_common.h>
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#include <security/vboot/vboot_common.h>
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#include <vboot_struct.h>
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#include <vboot_struct.h>
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@ -30,14 +31,41 @@
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static chromeos_acpi_t *chromeos_acpi;
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static chromeos_acpi_t *chromeos_acpi;
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static u32 me_hash_saved[8];
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static u32 me_hash_saved[8];
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static size_t chromeos_vpd_region(const char *region, uintptr_t *base)
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{
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struct region_device vpd;
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if (fmap_locate_area_as_rdev(region, &vpd))
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return 0;
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*base = (uintptr_t)rdev_mmap_full(&vpd);
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return region_device_sz(&vpd);
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}
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void chromeos_init_chromeos_acpi(chromeos_acpi_t *init)
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void chromeos_init_chromeos_acpi(chromeos_acpi_t *init)
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{
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{
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size_t vpd_size;
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uintptr_t vpd_base = 0;
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chromeos_acpi = init;
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chromeos_acpi = init;
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/* Copy saved ME hash into NVS */
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/* Copy saved ME hash into NVS */
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memcpy(chromeos_acpi->mehh, me_hash_saved, sizeof(chromeos_acpi->mehh));
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memcpy(chromeos_acpi->mehh, me_hash_saved, sizeof(chromeos_acpi->mehh));
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chromeos_ram_oops_init(chromeos_acpi);
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chromeos_ram_oops_init(chromeos_acpi);
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vpd_size = chromeos_vpd_region("RO_VPD", &vpd_base);
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if (vpd_size && vpd_base) {
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chromeos_acpi->vpd_ro_base = vpd_base;
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chromeos_acpi->vpd_ro_size = vpd_size;
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}
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vpd_size = chromeos_vpd_region("RW_VPD", &vpd_base);
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if (vpd_size && vpd_base) {
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chromeos_acpi->vpd_rw_base = vpd_base;
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chromeos_acpi->vpd_rw_size = vpd_size;
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}
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}
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}
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void chromeos_set_me_hash(u32 *hash, int len)
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void chromeos_set_me_hash(u32 *hash, int len)
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@ -70,7 +70,11 @@ typedef struct {
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u32 mehh[8]; // d9e management engine hash
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u32 mehh[8]; // d9e management engine hash
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u32 ramoops_base; // dbe ramoops base address
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u32 ramoops_base; // dbe ramoops base address
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u32 ramoops_len; // dc2 ramoops length
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u32 ramoops_len; // dc2 ramoops length
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u8 pad[314]; // dc6-eff
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u32 vpd_ro_base; // dc6 pointer to RO_VPD
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u32 vpd_ro_size; // dca size of RO_VPD
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u32 vpd_rw_base; // dce pointer to RW_VPD
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u32 vpd_rw_size; // dd2 size of RW_VPD
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u8 pad[298]; // dd6-eff
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} __packed chromeos_acpi_t;
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} __packed chromeos_acpi_t;
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void chromeos_init_chromeos_acpi(chromeos_acpi_t *init);
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void chromeos_init_chromeos_acpi(chromeos_acpi_t *init);
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