mb/intel/d945gclf: Add cmos.default

With this the system falls back to sane default
settings when nvram is invalid.

Change-Id: Ie13fd01c4f8403cbedbd7497ad9012c30f494a69
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/17042
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
This commit is contained in:
Arthur Heymans 2016-10-17 00:04:25 +02:00 committed by Martin Roth
parent 1ef1ef3f56
commit cfa1fd2b20
2 changed files with 8 additions and 0 deletions

View File

@ -23,6 +23,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select SOUTHBRIDGE_INTEL_I82801GX
select SUPERIO_SMSC_LPC47M15X
select HAVE_OPTION_TABLE
select HAVE_CMOS_DEFAULT
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
select HAVE_ACPI_TABLES

View File

@ -0,0 +1,7 @@
boot_option=Fallback
baud_rate=115200
debug_level=Spew
hyper_threading=Enable
nmi=Enable
boot_devices=''
gfx_uma_size=8M