google/kukui: Add MediaTek MT8183 reference board

BUG=b:80501386
BRANCH=none
TEST=timer and uart work fine

Change-Id: I08644892d34925574f791b000b0035d5afad7022
Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com>
Reviewed-on: https://review.coreboot.org/26722
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/mainboard/google/kukui/Kconfig

@@ -0,0 +1,23 @@
+if BOARD_GOOGLE_KUKUI
+
+config VBOOT
+	select VBOOT_MOCK_SECDATA
+
+config BOARD_SPECIFIC_OPTIONS
+	def_bool y
+	select SOC_MEDIATEK_MT8183
+	select BOARD_ROMSIZE_KB_4096
+	select MAINBOARD_HAS_CHROMEOS
+	select COMMON_CBFS_SPI_WRAPPER
+	select SPI_FLASH
+	select FATAL_ASSERTS
+
+config MAINBOARD_DIR
+	string
+	default google/kukui
+
+config MAINBOARD_PART_NUMBER
+	string
+	default "Kukui"
+
+endif

src/mainboard/google/kukui/Kconfig.name

@@ -0,0 +1,2 @@
+config BOARD_GOOGLE_KUKUI
+	bool "Kukui"

src/mainboard/google/kukui/Makefile.inc

@@ -0,0 +1,11 @@
+bootblock-y += memlayout.ld
+
+verstage-y += chromeos.c
+verstage-y += memlayout.ld
+
+romstage-y += chromeos.c
+romstage-y += memlayout.ld
+romstage-y += romstage.c
+
+ramstage-y += chromeos.c
+ramstage-y += memlayout.ld

src/mainboard/google/kukui/board_info.txt

@@ -0,0 +1,6 @@
+Vendor name: Google
+Board name: Kukui MediaTek MT8183 reference board
+Category: eval
+ROM protocol: SPI
+ROM socketed: n
+Flashrom support: y

src/mainboard/google/kukui/chromeos.c

@@ -0,0 +1,31 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2018 MediaTek Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <bootmode.h>
+#include <boot/coreboot_tables.h>
+
+void fill_lb_gpios(struct lb_gpios *gpios)
+{
+}
+
+int get_recovery_mode_switch(void)
+{
+	return 0;
+}
+
+int get_write_protect_state(void)
+{
+	return 0;
+}

src/mainboard/google/kukui/chromeos.fmd

@@ -0,0 +1,29 @@
+FLASH@0x0 0x400000 {
+	WP_RO@0x0 0x200000 {
+		RO_SECTION@0x0 0x1f0000 {
+			BOOTBLOCK@0 128K
+			COREBOOT(CBFS)@0x20000 0xe0000
+			FMAP@0x100000 0x1000
+			GBB@0x101000 0xeef00
+			RO_FRID@0x1eff00 0x100
+		}
+		RO_VPD@0x1f0000 0x10000
+	}
+	RW_SECTION_A@0x200000 0x78000 {
+		VBLOCK_A@0x0 0x2000
+		FW_MAIN_A(CBFS)@0x2000 0x75f00
+		RW_FWID_A@0x77f00 0x100
+	}
+	RW_SHARED@0x278000 0x2000 {
+		SHARED_DATA@0x0 0x2000
+	}
+	RW_NVRAM@0x27a000 0x2000
+	RW_ELOG@0x27c000 0x4000
+	RW_SECTION_B@0x280000 0x78000 {
+		VBLOCK_B@0x0 0x2000
+		FW_MAIN_B(CBFS)@0x2000 0x75f00
+		RW_FWID_B@0x77f00 0x100
+	}
+	RW_VPD@0x2f8000 0x8000
+	RW_LEGACY(CBFS)@0x300000 0x100000
+}

src/mainboard/google/kukui/devicetree.cb

@@ -0,0 +1,20 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright 2018 MediaTek Inc.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+
+chip soc/mediatek/mt8183
+	device cpu_cluster 0 on
+		device cpu 0 on end
+	end
+end

src/mainboard/google/kukui/memlayout.ld

@@ -0,0 +1,16 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2018 MediaTek Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <soc/memlayout.ld>

src/mainboard/google/kukui/romstage.c

@@ -0,0 +1,30 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2018 MediaTek Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/exception.h>
+#include <console/console.h>
+#include <program_loading.h>
+#include <timestamp.h>
+
+void main(void)
+{
+	timestamp_add_now(TS_START_ROMSTAGE);
+
+	/* Init UART baudrate when PLL on. */
+	console_init();
+	exception_init();
+
+	run_ramstage();
+}