libpayload: Make the region to scan for the cb tables configurable.

The address range to scan for the coreboot tables varies from machine to
machine based on the range memory occupies on the SOC being booted and on the
amount of memory installed on the machine. To make libpayload work on
different ARM systems with different needs, this change makes the region to
scan configurable. In the future, we might want to come up with a more
automatic mechanism like on x86, although there's less consistency on ARM as
far as what ranges are even memory in the first place.

Change-Id: Ib50efe25a6152171b0fbd0e324dbc5e89c527d6e
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/59242
Reviewed-by: Gabe Black <gabeblack@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
Reviewed-on: http://review.coreboot.org/4254
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
This commit is contained in:
Gabe Black 2013-06-19 04:54:38 -07:00 committed by Alexandru Gagniuc
parent 4bdc4aa297
commit cfe77beea4
2 changed files with 10 additions and 1 deletions

View File

@ -33,4 +33,12 @@ config ARCH_SPECIFIC_OPTIONS # dummy
def_bool y
select LITTLE_ENDIAN
config COREBOOT_INFO_RANGE_BASE
hex "Base of the range to search for the coreboot tables"
config COREBOOT_INFO_RANGE_SIZE
hex "Size of the range to search for the coreboot tables"
default 0x4000000
endif

View File

@ -284,7 +284,8 @@ static int cb_parse_header(void *addr, int len, struct sysinfo_t *info)
int get_coreboot_info(struct sysinfo_t *info)
{
int ret = cb_parse_header(phys_to_virt(0xbc000000), 0x4000000, info);
int ret = cb_parse_header(phys_to_virt(CONFIG_COREBOOT_INFO_RANGE_BASE),
CONFIG_COREBOOT_INFO_RANGE_SIZE, info);
return (ret == 1) ? 0 : -1;
}