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southbridge/intel/lynxpoint: refactor rtc failure checking 

In order to prepare for checking RTC failure in the early boot
paths move the rtc failure calculation to pmutil.c and add a helper
function to determine if failure occurred.

BUG=b:63054105

Change-Id: I368c31b9935c0fa9e8a1be416435dd76f44ec1ec
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/21557
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Aaron Durbin 2017-09-15 14:59:27 -06:00
parent b19e33f05c
commit cfe7ad1e8f
4 changed files with 19 additions and 10 deletions
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2
src/southbridge/intel/lynxpoint/Makefile.inc
View File

@ -49,7 +49,7 @@ smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c me_9.x.c finalize.c pch.c
smm-$(CONFIG_HAVE_SMI_HANDLER) += pmutil.c usb_ehci.c usb_xhci.c
romstage-y += early_usb.c early_smbus.c early_me.c me_status.c early_pch.c
romstage-y += reset.c early_spi.c rcba.c
romstage-y += reset.c early_spi.c rcba.c pmutil.c
ifeq ($(CONFIG_INTEL_LYNXPOINT_LP),y)
romstage-y += lp_gpio.c

12
src/southbridge/intel/lynxpoint/lpc.c
View File

@ -284,18 +284,14 @@ static void pch_power_options(device_t dev)
static void pch_rtc_init(struct device *dev)
{
u8 reg8;
int rtc_failed;
int rtc_failed = rtc_failure();
reg8 = pci_read_config8(dev, GEN_PMCON_3);
rtc_failed = reg8 & RTC_BATTERY_DEAD;
if (rtc_failed) {
reg8 &= ~RTC_BATTERY_DEAD;
pci_write_config8(dev, GEN_PMCON_3, reg8);
#if IS_ENABLED(CONFIG_ELOG)
if (IS_ENABLED(CONFIG_ELOG))
elog_add_event(ELOG_TYPE_RTC_RESET);
#endif
pci_update_config8(dev, GEN_PMCON_3, ~RTC_BATTERY_DEAD, 0);
}
printk(BIOS_DEBUG, "rtc_failed = 0x%x\n", rtc_failed);
cmos_init(rtc_failed);

3
src/southbridge/intel/lynxpoint/pch.h
View File

@ -172,6 +172,9 @@ void disable_all_gpe(void);
void enable_gpe(u32 mask);
void disable_gpe(u32 mask);
/* Return non-zero when RTC failure happened. */
int rtc_failure(void);
#if !defined(__PRE_RAM__) && !defined(__SMM__)
#include <device/device.h>
#include <arch/acpi.h>

10
src/southbridge/intel/lynxpoint/pmutil.c
View File

@ -553,3 +553,13 @@ void disable_gpe(u32 mask)
gpe0_en &= ~mask;
outl(gpe0_en, get_pmbase() + gpe0_reg);
}
int rtc_failure(void)
{
#if defined(__SIMPLE_DEVICE__)
device_t dev = PCI_DEV(0, 31, 0);
#else
device_t dev = dev_find_slot(0, PCI_DEVFN(31, 0));
#endif
return !!(pci_read_config8(dev, GEN_PMCON_3) & RTC_BATTERY_DEAD);
}