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mb/google/skyrim: Rename pcie_gpio_table to romstage_gpio_table 

Rename so table more indicative of when GPIOs are set, and so it can
be used for more than just setting PCIe GPIOs.

Rename the getter function to match.

Change-Id: I285602209072247895c2cb0830f3faf675328757
Signed-off-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67810
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Matt DeVillier 2022-09-23 14:25:41 -05:00 committed by Felix Held
parent 4236e2a23a
commit cfec5ddc16
3 changed files with 9 additions and 8 deletions
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2
src/mainboard/google/skyrim/romstage.c
View File

@ -9,7 +9,7 @@ void mb_pre_fspm(FSP_M_CONFIG *mcfg)
const struct soc_amd_gpio *base_gpios;
/* Initialize PCIe reset. */
variant_pcie_gpio_table(&base_gpios, &base_num_gpios);
variant_romstage_gpio_table(&base_gpios, &base_num_gpios);
gpio_configure_pads(base_gpios, base_num_gpios);
}

11
src/mainboard/google/skyrim/variants/baseboard/gpio.c
View File

@ -188,8 +188,9 @@ static const struct soc_amd_gpio early_gpio_table[] = {
PAD_GPO(GPIO_9, HIGH),
};
/* PCIE_RST needs to be brought high before FSP-M runs */
static const struct soc_amd_gpio pcie_gpio_table[] = {
/* Romstage GPIO configuration */
static const struct soc_amd_gpio romstage_gpio_table[] = {
/* PCIE_RST needs to be brought high before FSP-M runs */
/* Deassert all AUX_RESET lines & PCIE_RST */
/* WLAN_AUX_RESET_L (ACTIVE LOW) */
PAD_GPO(GPIO_7, HIGH),
@ -201,10 +202,10 @@ static const struct soc_amd_gpio pcie_gpio_table[] = {
PAD_GPO(GPIO_6, HIGH),
};
__weak void variant_pcie_gpio_table(const struct soc_amd_gpio **gpio, size_t *size)
__weak void variant_romstage_gpio_table(const struct soc_amd_gpio **gpio, size_t *size)
{
*size = ARRAY_SIZE(pcie_gpio_table);
*gpio = pcie_gpio_table;
*size = ARRAY_SIZE(romstage_gpio_table);
*gpio = romstage_gpio_table;
}
void baseboard_gpio_table(const struct soc_amd_gpio **gpio, size_t *size)

4
src/mainboard/google/skyrim/variants/baseboard/include/baseboard/variants.h
View File

@ -38,7 +38,7 @@ void variant_espi_gpio_table(const struct soc_amd_gpio **gpio, size_t *size);
/* This function provides GPIO settings for TPM i2c bus. */
void variant_tpm_gpio_table(const struct soc_amd_gpio **gpio, size_t *size);
/* This function provides GPIO settings before PCIe enumeration. */
void variant_pcie_gpio_table(const struct soc_amd_gpio **gpio, size_t *size);
/* This function provides GPIO settings in romstage. */
void variant_romstage_gpio_table(const struct soc_amd_gpio **gpio, size_t *size);
#endif /* __BASEBOARD_VARIANTS_H__ */