exynos5420: Tighten up displayport timing loops
We were running this loop 100 times with 5 ms delays. Change it to run 500 times with 1 ms delays, which gives us the same overall timeout but lets us bail out a bit sooner -- in practice, at most, 4 ms sooner but every bit counts. Note, however, that the tighter timing does reduce opportunities for threading. There is a non-obvious set of tradeoffs on timeouts. Change-Id: I4af671c2a791aa92e446e66ac2fe5710d1e6aa4c Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: https://chromium-review.googlesource.com/167387 Reviewed-by: David Hendricks <dhendrix@chromium.org> Commit-Queue: ron minnich <rminnich@chromium.org> Tested-by: ron minnich <rminnich@chromium.org> (cherry picked from commit 575e910127dc74416018f182ef27ef223e61daef) Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6543 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
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@ -845,7 +845,7 @@ static unsigned int exynos_dp_config_video(struct edp_device_info *edp_info)
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exynos_dp_start_video();
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if (edp_info->video_info.master_mode == 0) {
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retry_cnt = 100;
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retry_cnt = 500;
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while (retry_cnt) {
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ret = exynos_dp_is_video_stream_on();
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if (ret != EXYNOS_DP_SUCCESS) {
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@ -857,7 +857,10 @@ static unsigned int exynos_dp_config_video(struct edp_device_info *edp_info)
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printk(BIOS_DEBUG, "DP video stream is on\n");
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break;
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}
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mdelay(5);
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/* this is a cheap operation, involving some register
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* reads, and no AUX channel IO. A ms. delay is fine.
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*/
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mdelay(1);
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}
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}
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