soc/intel/cannonlake: Remove SOC_INTEL_CANNONLAKE_MEMCFG_INIT Kconfig
This patch removes duplicate selects of same SOC_INTEL_CANNONLAKE_MEMCFG_INIT from various CFL/WHL SoC based boards to include cnl_memcfg_init.c file and include the cnl_memcfg_init.c file by default in CNL SoC Makefile.inc. Change-Id: Ib21ea305871dc859e7db0720c18a9479100346c3 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/31134 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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@ -13,7 +13,6 @@ config BOARD_GOOGLE_BASEBOARD_HATCH
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select MAINBOARD_HAS_CHROMEOS
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select MAINBOARD_HAS_CHROMEOS
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select MAINBOARD_HAS_SPI_TPM_CR50
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select MAINBOARD_HAS_SPI_TPM_CR50
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select MAINBOARD_HAS_TPM2
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select MAINBOARD_HAS_TPM2
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select SOC_INTEL_CANNONLAKE_MEMCFG_INIT
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select SOC_INTEL_COFFEELAKE
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select SOC_INTEL_COFFEELAKE
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select SYSTEM_TYPE_LAPTOP
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select SYSTEM_TYPE_LAPTOP
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@ -15,7 +15,6 @@ config BOARD_GOOGLE_BASEBOARD_SARIEN
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select MAINBOARD_HAS_CHROMEOS
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select MAINBOARD_HAS_CHROMEOS
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select MAINBOARD_HAS_I2C_TPM_CR50
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select MAINBOARD_HAS_I2C_TPM_CR50
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select MAINBOARD_HAS_TPM2
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select MAINBOARD_HAS_TPM2
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select SOC_INTEL_CANNONLAKE_MEMCFG_INIT
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select SOC_INTEL_COMMON_ACPI_EC_PTS_WAK
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select SOC_INTEL_COMMON_ACPI_EC_PTS_WAK
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select SOC_INTEL_COFFEELAKE
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select SOC_INTEL_COFFEELAKE
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select SOC_INTEL_COMMON_BLOCK_HDA_VERB
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select SOC_INTEL_COMMON_BLOCK_HDA_VERB
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@ -13,7 +13,6 @@ config BOARD_SPECIFIC_OPTIONS
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select DRIVERS_I2C_HID
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select DRIVERS_I2C_HID
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select DRIVERS_I2C_GENERIC
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select DRIVERS_I2C_GENERIC
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select SOC_INTEL_COFFEELAKE
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select SOC_INTEL_COFFEELAKE
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select SOC_INTEL_CANNONLAKE_MEMCFG_INIT
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select SOC_INTEL_CANNONLAKE_PCH_H if BOARD_INTEL_COFFEELAKE_RVP11 || BOARD_INTEL_COFFEELAKE_RVP8
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select SOC_INTEL_CANNONLAKE_PCH_H if BOARD_INTEL_COFFEELAKE_RVP11 || BOARD_INTEL_COFFEELAKE_RVP8
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select SOC_INTEL_COMMON_BLOCK_HDA_VERB if BOARD_INTEL_COFFEELAKE_RVP11 || BOARD_INTEL_COFFEELAKE_RVP8 || BOARD_INTEL_WHISKEYLAKE_RVP
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select SOC_INTEL_COMMON_BLOCK_HDA_VERB if BOARD_INTEL_COFFEELAKE_RVP11 || BOARD_INTEL_COFFEELAKE_RVP8 || BOARD_INTEL_WHISKEYLAKE_RVP
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select SOC_INTEL_COMMON_BLOCK_HDA if BOARD_INTEL_WHISKEYLAKE_RVP
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select SOC_INTEL_COMMON_BLOCK_HDA if BOARD_INTEL_WHISKEYLAKE_RVP
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@ -170,10 +170,6 @@ config CPU_BCLK_MHZ
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int
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int
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default 100
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default 100
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config SOC_INTEL_CANNONLAKE_MEMCFG_INIT
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bool
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default n
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config SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ
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config SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ
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int
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int
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default 120
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default 120
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@ -21,7 +21,7 @@ bootblock-y += lpc.c
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bootblock-y += p2sb.c
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bootblock-y += p2sb.c
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bootblock-y += uart.c
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bootblock-y += uart.c
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romstage-$(CONFIG_SOC_INTEL_CANNONLAKE_MEMCFG_INIT) += cnl_memcfg_init.c
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romstage-y += cnl_memcfg_init.c
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romstage-y += gspi.c
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romstage-y += gspi.c
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romstage-y += i2c.c
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romstage-y += i2c.c
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romstage-y += lpc.c
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romstage-y += lpc.c
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