nb/intel/ironlake/raminit_heci.c: Move to southbridge scope

HECI stuff is in the southbridge, so put the code in there. Rename the
file to match the name of the function it provides.

Change-Id: I71de1234547dbd46a9b4959c619d2ae194da620a
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61931
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>

src/northbridge/intel/ironlake/Makefile.inc

@@ -11,7 +11,6 @@ ramstage-y += gma.c
 
 romstage-y += memmap.c
 romstage-y += raminit.c
-romstage-y += raminit_heci.c
 romstage-y += raminit_tables.c
 romstage-y += early_init.c
 romstage-y += romstage.c

src/northbridge/intel/ironlake/raminit.h

@@ -106,6 +106,4 @@ u16 get_max_timing(struct raminfo *info, int channel);
 void early_quickpath_init(struct raminfo *info, const u8 x2ca8);
 void late_quickpath_init(struct raminfo *info, const int s3resume);
 
-void setup_heci_uma(u64 heci_uma_addr, unsigned int heci_uma_size);
-
 #endif				/* RAMINIT_H */

src/southbridge/intel/ibexpeak/Makefile.inc

@@ -33,6 +33,7 @@ romstage-y += early_thermal.c
 romstage-y += ../bd82x6x/early_rcba.c
 romstage-y += early_cir.c
 romstage-y += early_usb.c
+romstage-y += setup_heci_uma.c
 
 CPPFLAGS_common += -I$(src)/southbridge/intel/ibexpeak/include
 

src/southbridge/intel/ibexpeak/me.h

@@ -231,6 +231,8 @@ int intel_early_me_init(void);
 int intel_early_me_uma_size(void);
 int intel_early_me_init_done(u8 status);
 
+void setup_heci_uma(u64 heci_uma_addr, unsigned int heci_uma_size);
+
 typedef struct {
 	u32       major_version  : 16;
 	u32       minor_version  : 16;

src/southbridge/intel/ibexpeak/setup_heci_uma.c

@@ -4,7 +4,7 @@
 #include <device/mmio.h>
 #include <device/pci_def.h>
 #include <device/pci_ops.h>
-#include <northbridge/intel/ironlake/raminit.h>
+#include <northbridge/intel/ironlake/ironlake.h>
 #include <southbridge/intel/ibexpeak/me.h>
 #include <types.h>