chip stuff
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@988 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Greg Watson
parent
9b4336cf41
commit
d0580343b6
6 changed files with 157 additions and 85 deletions
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@ -71,9 +71,9 @@ makerule linuxbios
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end
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makerule linuxbios.a
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depends "$(OBJECTS-1)"
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depends "$(OBJECTS)"
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action "rm -f linuxbios.a"
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action "ar cr linuxbios.a $(OBJECTS-1)"
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action "ar cr linuxbios.a $(OBJECTS)"
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end
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#makerule crt0.S
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@ -152,6 +152,7 @@ makerule clean
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action "rm -f TAGS tags"
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action "rm -f docipl"
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action "rm -f build_opt_tbl option_table.c crt0.S"
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action "rm -f chip_*.c"
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end
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# do standard config files that the user need not specify
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15
src/devices/chip.c
Normal file
15
src/devices/chip.c
Normal file
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@ -0,0 +1,15 @@
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/* chips are arbitrary chips (superio, southbridge, etc.)
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* They have private structures that define chip resources and default
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* settings. They have four externally visible functions for control.
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* They have a generic component which applies to all chips for
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* path, etc.
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*/
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#include <device/chip.h>
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void
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chip_configure(struct chip *root, enum chip_pass pass)
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{
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while (root) {
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}
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}
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@ -22,6 +22,14 @@ struct lpt_ports {
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irq; // irq
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};
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enum chip_pass {
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CHIP_PRE_CONSOLE,
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CHIP_PRE_DEVICE_ENUMERATE,
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CHIP_PRE_DEVICE_CONFIGURE,
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CHIP_PRE_DEVICE_ENABLE,
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CHIP_PRE_DEVICE_INITIALIZE,
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CHIP_PRE_BOOT
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};
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/* linkages from devices of a type (e.g. superio devices)
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@ -33,10 +41,7 @@ struct chip;
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/* there is one of these for each TYPE of chip */
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struct chip_control {
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void (*alloc)(struct chip *s);
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void (*pre_pci_init)(struct chip *s);
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void (*init)(struct chip *s);
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void (*finishup)(struct chip *s);
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void (*enable)(struct chip *, enum chip_pass);
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char *path; /* the default path. Can be overridden
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* by commands in config
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*/
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@ -54,3 +59,5 @@ struct chip {
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void *chip_info; /* the dreaded "void *" */
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};
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extern struct chip *root;
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extern void chip_configure(struct chip *, enum chip_pass);
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5
src/superio/NSC/pc97307/chip.h
Normal file
5
src/superio/NSC/pc97307/chip.h
Normal file
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@ -0,0 +1,5 @@
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struct superio_NSC_pc97307_config {
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typedef struct com_ports com1;
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typedef struct lpt_ports lpt;
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};
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@ -2,6 +2,7 @@
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/* This code is distributed without warranty under the GPL v2 (see COPYING) */
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#include <arch/io.h>
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#include <device/chip.h>
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#ifndef PNP_INDEX_REG
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#define PNP_INDEX_REG 0x15C
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@ -18,26 +19,28 @@
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void pnp_output(char address, char data)
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{
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outb(address, PNP_INDEX_REG);
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outb(data, PNP_DATA_REG);
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outb(address, PNP_INDEX_REG);
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outb(data, PNP_DATA_REG);
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}
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void sio_enable(void)
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void sio_enable(struct chip *chip, enum chip_pass pass)
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{
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/* Enable Super IO Chip */
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pnp_output(0x07, 6); /* LD 6 = UART1 */
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pnp_output(0x30, 0); /* Dectivate */
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pnp_output(0x60, SIO_COM1_BASE >> 8); /* IO Base */
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pnp_output(0x61, SIO_COM1_BASE & 0xFF); /* IO Base */
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pnp_output(0x30, 1); /* Activate */
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switch (pass) {
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case CHIP_PRE_CONSOLE:
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/* Enable Super IO Chip */
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pnp_output(0x07, 6); /* LD 6 = UART1 */
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pnp_output(0x30, 0); /* Dectivate */
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pnp_output(0x60, chip->control->defaultport >> 8); /* IO Base */
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pnp_output(0x61, chip->control->defaultport & 0xFF); /* IO Base */
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pnp_output(0x30, 1); /* Activate */
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break;
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default:
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/* nothing yet */
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}
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}
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#if 0
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struct superio_control superio_NSC_pc97307_control = {
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pre_pci_init: (void *)0,
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init: (void *)0,
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finishup: (void *)0,
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enable: sio_enable,
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defaultport: SIO_COM1_BASE,
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name: "NSC 87307"
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};
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#endif
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@ -3,7 +3,6 @@ import os
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import re
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import string
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debug = 0
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warnings = 0
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errors = 0
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@ -79,6 +78,31 @@ class stack:
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partstack = stack()
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dirstack = stack()
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class debug_info:
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none = 0
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gencode = 1
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dumptree = 2
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object = 3
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dict = 4
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statement = 5
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dump = 6
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def __init__(self, *level):
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self.__level = level
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def setdebug(self, *level):
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self.__level = level
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def level(self, level):
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return level in self.__level
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def info(self, level, str):
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if level in self.__level:
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print str
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global debug
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debug = debug_info(debug_info.none)
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# -----------------------------------------------------------------------------
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# Error Handling
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# -----------------------------------------------------------------------------
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@ -155,11 +179,6 @@ def exitiferrors():
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if (errors != 0):
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sys.exit(1)
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def debug_print(level, str):
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global debug
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if (debug >= level):
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print str
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# -----------------------------------------------------------------------------
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# Main classes
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# -----------------------------------------------------------------------------
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@ -250,7 +269,7 @@ class romimage:
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else:
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source = os.path.join(dirstack.tos(), base + suffix)
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object = base + '.o'
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debug_print(1, "add object %s source %s" % (object_name, source))
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debug.info(debug.object, "add object %s source %s" % (object_name, source))
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l = getdict(dict, base)
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if (l):
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print "Warning, object/driver %s previously defined" % base
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@ -308,7 +327,7 @@ class romimage:
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if (str != 0):
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self.useinitincludes = 1
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debug_print(2, "ADDCRT0: %s -> %s" % (str, path))
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debug.info(debug.object, "ADDCRT0: %s -> %s" % (str, path))
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o = getdict(self.initincludes, path)
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if (o):
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print "Warning, init include for %s previously defined" % path
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@ -501,20 +520,20 @@ class option_value:
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class partobj:
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"""A configuration part"""
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def __init__ (self, image, dir, parent, type, name):
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debug_print(1, "partobj dir %s parent %s type %s" %(dir,parent,type))
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debug.info(debug.object, "partobj dir %s parent %s type %s" %(dir,parent,type))
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self.image = image
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self.children = 0
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self.siblings = 0
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self.initcode = []
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self.registercode = []
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# sibling is not a list.
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self.siblings = 0
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self.type = type
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self.objects = []
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self.dir = dir
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self.irq = 0
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self.instance = image.newpartinstance()
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self.flatten_name = flatten_name(type + "/" + name)
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debug_print(1, "INSTANCE %d" % self.instance)
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debug.info(debug.object, "INSTANCE %d" % self.instance)
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self.devfn = 0
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self.private = 0
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self.uses_options = {}
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@ -527,12 +546,12 @@ class partobj:
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self.chipconfig = 0
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if (parent):
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debug_print(1, "add to parent")
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debug.info(debug.gencode, "add to parent")
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self.parent = parent
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# add current child as my sibling,
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# me as the child.
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if (parent.children):
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debug_print(1, "add %s (%d) as sibling" % (parent.children.dir, parent.children.instance))
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debug.info(debug.gencode, "add %s (%d) as sibling" % (parent.children.dir, parent.children.instance))
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self.siblings = parent.children
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parent.children = self
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else:
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@ -559,6 +578,10 @@ class partobj:
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def gencode(self, file):
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if (self.chipconfig):
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debug.info(debug.gencode, "gencode: chipconfig(%d)" % self.instance)
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file.write("#include \"%s/chip.h\"\n" % self.dir)
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file.write("extern struct superio_control %s_control;\n" % \
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self.flatten_name)
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file.write("struct %s_config %s_config_%d" % (\
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self.flatten_name ,\
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self.flatten_name , \
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@ -578,8 +601,10 @@ class partobj:
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file.write("/* %s %s */\n" % (self.type, self.dir))
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#file.write(" .devfn = %d,\n" % self.devfn)
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if (self.siblings):
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debug.info(debug.gencode, "gencode: siblings(%d)" % self.siblings.instance)
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file.write(" .next = &dev%d,\n" % self.siblings.instance)
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if (self.children):
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debug.info(debug.gencode, "gencode: children(%d)" % self.children.instance)
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file.write(" .children = &dev%d,\n" % \
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self.children.instance)
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if (self.private):
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@ -622,14 +647,14 @@ class partobj:
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def getdict(dict, name):
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if name not in dict.keys():
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debug_print(1, "Undefined: %s" % name)
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debug.info(debug.dict, "Undefined: %s" % name)
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return 0
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v = dict.get(name, 0)
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debug_print(1, "getdict %s returning %s" % (name, v))
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debug.info(debug.dict, "getdict %s returning %s" % (name, v))
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return v
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def setdict(dict, name, value):
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debug_print(1, "setdict sets %s to %s" % (name, value))
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debug.info(debug.dict, "setdict sets %s to %s" % (name, value))
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dict[name] = value
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# options.
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@ -860,7 +885,7 @@ def addldscript(path):
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fullpath = treetop + '/src/' + path
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else:
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fullpath = curdir + '/' + path
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debug_print(1, "fullpath :%s: curdir :%s: path :%s:" % (fullpath, curdir, path))
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debug.info(debug.statement, "fullpath :%s: curdir :%s: path :%s:" % (fullpath, curdir, path))
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curimage.addldscript(fullpath)
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def payload(path):
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@ -965,7 +990,7 @@ def dodir(path, file):
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path = re.sub('^/*', '', path)
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else:
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fullpath = dirstack.tos()
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debug_print(1, "DODIR: path %s, fullpath %s" % (path, fullpath))
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debug.info(debug.statement, "DODIR: path %s, fullpath %s" % (path, fullpath))
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dirstack.push(os.path.join(fullpath, path))
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doconfigfile(fullpath, path, file)
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dirstack.pop()
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@ -1012,13 +1037,13 @@ def doconfigfile(path, confdir, file):
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# MISC FUNCTIONS
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#=============================================================================
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def ternary(val, yes, no):
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debug_print(1, "ternary %s" % expr)
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debug_print(1, "expr %s a %d yes %d no %d"% (expr, a, yes, no))
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debug.info(debug.statement, "ternary %s" % expr)
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debug.info(debug.statement, "expr %s a %d yes %d no %d"% (expr, a, yes, no))
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if (val == 0):
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debug_print("Ternary returns %d" % yes)
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debug.info(debug.statement, "Ternary returns %d" % yes)
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return yes
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else:
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debug_print("Ternary returns %d" % no)
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debug.info(debug.statement, "Ternary returns %d" % no)
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return no
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def tohex(name):
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@ -1427,9 +1452,13 @@ def writeimagemakefile(image):
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for objrule, obj in image.getobjectrules().items():
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obj_name = obj[0]
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obj_source = obj[1]
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file.write("OBJECTS-1 += %s\n" % (obj_name))
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file.write("OBJECTS += %s\n" % (obj_name))
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file.write("SOURCES += %s\n" % (obj_source))
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# for chip_target.c
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file.write("OBJECTS += chip_%s.o\n" % target_name)
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file.write("SOURCES += chip_%s.c\n" % target_name)
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for driverrule, driver in image.getdriverrules().items():
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obj_name = driver[0]
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obj_source = driver[1]
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@ -1481,17 +1510,21 @@ def writeimagemakefile(image):
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file.write("\t$(CC) -c $(CFLAGS) -o $@ $<\n")
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#file.write("%s\n" % objrule[2])
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# special rule for chips_target.c
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file.write("chip_%s.o: chip_%s.c\n" % (target_name, target_name))
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file.write("\t$(CC) -c $(CFLAGS) -o $@ $<\n")
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# Print out the rules that will make cause the files
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# generated by NLBConfig.py to be remade if any dependencies change.
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file.write("\n# Remember the automatically generated files\n")
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file.write("GENERATED:=\n")
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for genfile in [ 'Makefile',
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for genfile in ['Makefile',
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'nsuperio.c',
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'chip.c',
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'chip_%s.c' % target_name,
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'LinuxBIOSDoc.config' ]:
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file.write("GENERATED += %s\n" % genfile)
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file.write("GENERATED += %s\n" % image.getincludefilename())
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file.write("GENERATED += %s\n" % image.getincludefilename())
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#file.write("\n# Remake Makefile (and the other files generated by\n")
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#file.write("# NLBConfig.py) if any config dependencies change.\n")
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@ -1581,44 +1614,67 @@ def writeldoptions(image):
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file.write("%s = %s;\n" % (i, getformated(i, image)))
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file.close()
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def verifyparse(image):
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"""Add any run-time checks to verify that parsing the configuration
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was successful"""
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if (image.newformat() and image.getinitfile() == ''):
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fatal("An init file must be specified")
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def dumptree(part, lvl):
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debug_print(1, "DUMPTREE ME is")
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debug.info(debug.dumptree, "DUMPTREE ME is")
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part.dumpme(lvl)
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# dump the siblings -- actually are there any? not sure
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# siblings are:
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debug_print(1, "DUMPTREE SIBLINGS are")
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debug.info(debug.dumptree, "DUMPTREE SIBLINGS are")
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kid = part.siblings
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while (kid):
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kid.dumpme(lvl)
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kid = kid.siblings
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# dump the kids
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debug_print(1, "DUMPTREE KIDS are")
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debug.info(debug.dumptree, "DUMPTREE KIDS are")
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#for kid in part.children:
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if (part.children):
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dumptree(part.children, lvl+1)
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debug_print(1, "DONE DUMPTREE")
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debug.info(debug.dumptree, "DONE DUMPTREE")
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def writecode(image):
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filename = os.path.join(img_dir, "chips_%s.c" % target_name)
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print "Creating", filename
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file = open(filename, 'w+')
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# gen all the forward references
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i = 0
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file.write("#include <device/chip.h>\n")
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file.write("struct chip ")
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while (i <= image.numparts()):
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if (i):
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file.write("cdev%d "% i)
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else:
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file.write("root ")
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i = i + 1
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file.write(";\n")
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gencode(image.getroot(), file)
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file.close()
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def gencode(part, file):
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debug_print(1, "GENCODE ME is")
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debug.info(debug.gencode, "GENCODE ME is")
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part.gencode(file)
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# dump the siblings -- actually are there any? not sure
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# dump the kids
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debug_print(1, "GENCODE SIBLINGS are")
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debug.info(debug.gencode, "GENCODE SIBLINGS are")
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kid = part.siblings
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while (kid):
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kid.gencode(file)
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kid = kid.siblings
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debug_print(1, "GENCODE KIDS are")
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#for kid in part.children:
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# now dump the children
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debug.info(debug.gencode, "GENCODE KIDS are")
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if (part.children):
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gencode(part.children, file)
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debug_print(1, "DONE GENCODE")
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kid = part.siblings
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while (kid):
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if (kid.children):
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gencode(kid.children, file)
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kid = kid.siblings
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debug.info(debug.gencode, "DONE GENCODE")
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def verifyparse(image):
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"""Add any run-time checks to verify that parsing the configuration
|
||||
was successful"""
|
||||
if (image.newformat() and image.getinitfile() == ''):
|
||||
fatal("An init file must be specified")
|
||||
|
||||
#=============================================================================
|
||||
# MAIN PROGRAM
|
||||
|
|
@ -1646,42 +1702,27 @@ if __name__=='__main__':
|
|||
alloptions = 1
|
||||
|
||||
for image_name, image in romimages.items():
|
||||
if (debug):
|
||||
debug_print(1, "DEVICE TREE:")
|
||||
if (debug.level(debug.dumptree)):
|
||||
debug.info(debug.dumptree, "DEVICE TREE:")
|
||||
dumptree(image.getroot(), 0)
|
||||
|
||||
img_dir = image.gettargetdir()
|
||||
if not os.path.isdir(img_dir):
|
||||
print "Creating directory %s" % img_dir
|
||||
os.makedirs(img_dir)
|
||||
filename = os.path.join(img_dir, "chips.c")
|
||||
print "Creating", filename
|
||||
file = open(filename, 'w+')
|
||||
# gen all the forward references
|
||||
|
||||
i = 0
|
||||
file.write("struct chip ")
|
||||
while (i <= image.numparts()):
|
||||
if (i):
|
||||
file.write("cdev%d "% i)
|
||||
else:
|
||||
file.write("root ")
|
||||
i = i + 1
|
||||
file.write(";\n")
|
||||
gencode(image.getroot(), file)
|
||||
file.close()
|
||||
|
||||
# crt0 includes
|
||||
if (debug):
|
||||
if (debug.level(debug.dump)):
|
||||
for i in image.getinitincludes().keys():
|
||||
debug_print(1, "crt0include file %s" % i)
|
||||
debug.info(debug.dump, "crt0include file %s" % i)
|
||||
for i in image.getdriverrules().keys():
|
||||
debug_print(1, "driver file %s" % i)
|
||||
debug.info(debug.dump, "driver file %s" % i)
|
||||
for i in image.getldscripts():
|
||||
debug_print(1, "ldscript file %s" % i)
|
||||
debug.info(debug.dump, "ldscript file %s" % i)
|
||||
for i, m in image.getmakerules().items():
|
||||
debug_print(1, " makerule %s dep %s act %s" % (i, m.dependency, m.actions))
|
||||
debug.info(debug.dump, " makerule %s dep %s act %s" % (i, m.dependency, m.actions))
|
||||
|
||||
writecode(image)
|
||||
writeimagesettings(image)
|
||||
writeinitincludes(image)
|
||||
writeimagemakefile(image)
|
||||
|
|
|
|||
Loading…
Reference in a new issue