drivers/intel/gma: Ditch `link_frequency_270_mhz` setting
The `link_frequency_270_mhz` setting was originally used by the native graphics init code for Sandy/Ivy Bridge, which is long gone. The value of this information (which board had it set) is questionable. The only board that had an LVDS panel and set it to 0 was the ThinkPad L520, where native graphics init was never reported to work. Also, the native graphics init only used it for calculations, but never confi- gured the hardware to use a specific frequency. A look into the docu- mentation also doesn't reveal any straps that could be used to confi- gure it. Change-Id: Ieceaa13e4529096a8ba9036479fd84969faebd14 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39763 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Alexander Couzens <lynxis@fe80.eu> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -88,7 +88,6 @@ u32 gtt_read(u32 reg);
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struct i915_gpu_controller_info
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{
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int use_spread_spectrum_clock;
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int link_frequency_270_mhz;
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u32 backlight;
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int ndid;
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u32 did[5];
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@ -1,6 +1,5 @@
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chip northbridge/intel/sandybridge
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register "gfx.did" = "{ 0x80000410, 0x80000320, 0x80000410, 0x80000410, 0x00000005 }"
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register "gfx.link_frequency_270_mhz" = "0"
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register "gfx.ndid" = "2"
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register "gfx.use_spread_spectrum_clock" = "1"
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register "gpu_cpu_backlight" = "0x00001312"
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@ -14,7 +14,6 @@
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#
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chip northbridge/intel/sandybridge
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register "gfx.link_frequency_270_mhz" = "0"
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register "gfx.use_spread_spectrum_clock" = "0"
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register "gpu_cpu_backlight" = "0x00000000"
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register "gpu_dp_b_hotplug" = "4"
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@ -12,7 +12,6 @@
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chip northbridge/intel/sandybridge # FIXME: check gfx.ndid and gfx.did
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register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
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register "gfx.link_frequency_270_mhz" = "1"
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register "gfx.ndid" = "3"
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register "gpu_dp_b_hotplug" = "4"
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register "gpu_dp_c_hotplug" = "4"
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@ -16,7 +16,6 @@ chip northbridge/intel/sandybridge
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# For native gfx
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register "gfx.use_spread_spectrum_clock" = "0"
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register "gfx.link_frequency_270_mhz" = "1"
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register "gpu_cpu_backlight" = "0x1155"
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register "gpu_pch_backlight" = "0x06100610"
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@ -14,7 +14,6 @@
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##
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chip northbridge/intel/sandybridge
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register "gfx.link_frequency_270_mhz" = "0"
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register "gfx.use_spread_spectrum_clock" = "0"
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register "gpu_dp_b_hotplug" = "0"
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register "gpu_dp_c_hotplug" = "0"
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@ -15,7 +15,6 @@
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chip northbridge/intel/sandybridge
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register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410 }"
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register "gfx.link_frequency_270_mhz" = "1"
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register "gfx.ndid" = "3"
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register "gfx.use_spread_spectrum_clock" = "1"
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register "gpu_cpu_backlight" = "0x00000129"
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@ -14,7 +14,6 @@
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##
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chip northbridge/intel/sandybridge
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register "gfx.link_frequency_270_mhz" = "0"
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register "gfx.use_spread_spectrum_clock" = "0"
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register "gpu_dp_b_hotplug" = "0"
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register "gpu_dp_c_hotplug" = "0"
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@ -1,6 +1,5 @@
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chip northbridge/intel/sandybridge
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register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
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register "gfx.link_frequency_270_mhz" = "0"
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register "gfx.ndid" = "3"
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register "gfx.use_spread_spectrum_clock" = "0"
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register "gpu_cpu_backlight" = "0x00000000"
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@ -1,6 +1,5 @@
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chip northbridge/intel/sandybridge
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register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
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register "gfx.link_frequency_270_mhz" = "1"
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register "gfx.ndid" = "3"
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register "gfx.use_spread_spectrum_clock" = "1"
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register "gpu_cpu_backlight" = "0x00000060"
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@ -31,7 +31,6 @@ chip northbridge/intel/ironlake
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register "gpu_cpu_backlight" = "0x58d"
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register "gpu_pch_backlight" = "0x061a061a"
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register "gfx.use_spread_spectrum_clock" = "1"
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register "gfx.link_frequency_270_mhz" = "1"
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device cpu_cluster 0 on
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chip cpu/intel/model_2065x
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@ -14,7 +14,6 @@ chip northbridge/intel/sandybridge
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register "gpu_panel_power_backlight_on_delay" = "2000" # T3: 200ms
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register "gpu_panel_power_backlight_off_delay" = "2000" # T4: 200ms
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register "gfx.use_spread_spectrum_clock" = "1"
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register "gfx.link_frequency_270_mhz" = "1"
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register "gpu_cpu_backlight" = "0x1155"
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register "gpu_pch_backlight" = "0x06100610"
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@ -13,7 +13,6 @@ chip northbridge/intel/sandybridge
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register "gpu_panel_power_backlight_on_delay" = "2000" # T3: 200ms
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register "gpu_panel_power_backlight_off_delay" = "2000" # T4: 200ms
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register "gfx.use_spread_spectrum_clock" = "1"
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register "gfx.link_frequency_270_mhz" = "1"
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register "gpu_cpu_backlight" = "0x1155"
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register "gpu_pch_backlight" = "0x06100610"
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@ -13,7 +13,6 @@ chip northbridge/intel/sandybridge
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register "gpu_panel_power_backlight_on_delay" = "2100" # T3: 210ms
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register "gpu_panel_power_backlight_off_delay" = "2100" # T4: 210ms
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register "gfx.use_spread_spectrum_clock" = "1"
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register "gfx.link_frequency_270_mhz" = "1"
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register "gpu_cpu_backlight" = "0x1155"
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register "gpu_pch_backlight" = "0x11551155"
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@ -13,7 +13,6 @@ chip northbridge/intel/sandybridge
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register "gpu_panel_power_backlight_on_delay" = "2100" # T3: 210ms
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register "gpu_panel_power_backlight_off_delay" = "2100" # T4: 210ms
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register "gfx.use_spread_spectrum_clock" = "1"
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register "gfx.link_frequency_270_mhz" = "1"
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register "gpu_cpu_backlight" = "0x1155"
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register "gpu_pch_backlight" = "0x11551155"
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@ -14,7 +14,6 @@ chip northbridge/intel/sandybridge
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register "gpu_panel_power_backlight_on_delay" = "2000" # T3: 200ms
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register "gpu_panel_power_backlight_off_delay" = "2000" # T4: 200ms
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register "gfx.use_spread_spectrum_clock" = "1"
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register "gfx.link_frequency_270_mhz" = "1"
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register "gpu_cpu_backlight" = "0x1155"
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register "gpu_pch_backlight" = "0x06100610"
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@ -14,7 +14,6 @@ chip northbridge/intel/sandybridge
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register "gpu_panel_power_backlight_on_delay" = "2000" # T3: 200ms
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register "gpu_panel_power_backlight_off_delay" = "2000" # T4: 200ms
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register "gfx.use_spread_spectrum_clock" = "1"
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register "gfx.link_frequency_270_mhz" = "1"
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register "gpu_cpu_backlight" = "0x1155"
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register "gpu_pch_backlight" = "0x11551155"
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register "gpu_panel_power_backlight_on_delay" = "2000" # T3: 200ms
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register "gpu_panel_power_backlight_off_delay" = "2000" # T4: 200ms
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register "gfx.use_spread_spectrum_clock" = "1"
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register "gfx.link_frequency_270_mhz" = "1"
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register "gpu_cpu_backlight" = "0x1155"
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register "gpu_pch_backlight" = "0x11551155"
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register "gpu_panel_power_backlight_on_delay" = "3000"
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register "gpu_panel_power_backlight_off_delay" = "2000"
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register "gfx.use_spread_spectrum_clock" = "1"
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register "gfx.link_frequency_270_mhz" = "1"
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register "gpu_cpu_backlight" = "0x1155"
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register "gpu_pch_backlight" = "0x11551155"
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@ -1,6 +1,5 @@
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chip northbridge/intel/sandybridge
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register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
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register "gfx.link_frequency_270_mhz" = "1"
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register "gfx.ndid" = "3"
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register "gfx.use_spread_spectrum_clock" = "1"
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register "gpu_cpu_backlight" = "0x00001155"
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@ -32,7 +32,6 @@ chip northbridge/intel/ironlake
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register "gpu_cpu_backlight" = "0x58d"
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register "gpu_pch_backlight" = "0x061a061a"
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register "gfx.use_spread_spectrum_clock" = "1"
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register "gfx.link_frequency_270_mhz" = "1"
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device cpu_cluster 0 on
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chip cpu/intel/model_2065x
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register "gpu_panel_power_backlight_on_delay" = "2000" # T3: 200ms
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register "gpu_panel_power_backlight_off_delay" = "2000" # T4: 200ms
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register "gfx.use_spread_spectrum_clock" = "1"
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register "gfx.link_frequency_270_mhz" = "1"
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register "gpu_cpu_backlight" = "0x1155"
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register "gpu_pch_backlight" = "0x06100610"
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register "gpu_panel_power_backlight_on_delay" = "2100" # T3: 210ms
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register "gpu_panel_power_backlight_off_delay" = "2100" # T4: 210ms
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register "gfx.use_spread_spectrum_clock" = "1"
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register "gfx.link_frequency_270_mhz" = "1"
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register "gpu_cpu_backlight" = "0x1155"
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register "gpu_pch_backlight" = "0x11551155"
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@ -1,5 +1,4 @@
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chip northbridge/intel/sandybridge
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register "gfx.link_frequency_270_mhz" = "0"
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device cpu_cluster 0x0 on
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chip cpu/intel/model_206ax
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register "c1_acpower" = "1"
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register "gpu_cpu_backlight" = "0x58d"
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register "gpu_pch_backlight" = "0x061a061a"
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register "gfx.use_spread_spectrum_clock" = "0"
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register "gfx.link_frequency_270_mhz" = "1"
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device cpu_cluster 0 on
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chip cpu/intel/model_2065x
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@ -14,26 +14,6 @@ func (i sandybridgemc) Scan(ctx Context, addr PCIDevData) {
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GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
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`)
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pchLVDS := inteltool.IGD[0xe1180]
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dualChannel := pchLVDS&(3<<2) == (3 << 2)
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pipe := (pchLVDS >> 30) & 1
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link_m1 := inteltool.IGD[0x60040+0x1000*pipe]
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link_n1 := inteltool.IGD[0x60044+0x1000*pipe]
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link_factor := float32(link_m1) / float32(link_n1)
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fp0 := inteltool.IGD[0xc6040+8*pipe]
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dpll := inteltool.IGD[0xc6014+4*pipe]
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pixel_m2 := fp0 & 0xff
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pixel_m1 := (fp0>>8)&0xff + 2
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pixel_p1 := uint32(1)
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for i := dpll & 0x1ffff; i != 0 && i&1 == 0; i >>= 1 {
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pixel_p1++
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}
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pixel_n := ((fp0 >> 16) & 0xff) + 2
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pixel_frequency := float32(120000*(5*pixel_m1+pixel_m2)) / float32(pixel_n*pixel_p1*7.0)
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if !dualChannel {
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pixel_frequency /= 2
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}
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link_frequency := pixel_frequency / link_factor
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DevTree = DevTreeNode{
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Chip: "northbridge/intel/sandybridge",
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MissingParent: "northbridge",
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"gpu_cpu_backlight": FormatHex32(inteltool.IGD[0x48254]),
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"gpu_pch_backlight": FormatHex32((inteltool.IGD[0xc8254] >> 16) * 0x10001),
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"gfx.use_spread_spectrum_clock": FormatBool((inteltool.IGD[0xc6200]>>12)&1 != 0),
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"gfx.link_frequency_270_mhz": FormatBool(link_frequency > 200000),
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},
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Children: []DevTreeNode{
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{
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