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coreboot-kgpe-d16
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Some coding style and consistency fixes (trivial). 

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4117 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Uwe Hermann 2009-04-15 10:52:49 +00:00
parent 82144571ad
commit d086e5d966
8 changed files with 60 additions and 46 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
util/flashrom/cbtable.c
View File

@ -207,7 +207,7 @@ int coreboot_init(void)
(((char *)lb_table) + lb_table->header_bytes);
if (forward->tag == LB_TAG_FORWARD) {
start = forward->forward;
start &= ~(getpagesize()-1);
start &= ~(getpagesize() - 1);
physunmap(table_area, BYTES_TO_MAP);
table_area = physmap("high tables", start, BYTES_TO_MAP);
lb_table = find_lb_table(table_area, 0x00000, 0x1000);

2
util/flashrom/chipset_enable.c
View File

@ -846,7 +846,7 @@ static int get_flashbase_sc520(struct pci_dev *dev, const char *name)
}
/* 4. Clean up */
munmap (mmcr, getpagesize());
munmap(mmcr, getpagesize());
return 0;
}

12
util/flashrom/ichspi.c
View File

@ -19,7 +19,6 @@
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*
*/
/*
@ -340,7 +339,7 @@ int program_opcodes(OPCODES * op)
*
* It should be called before ICH sends any spi command.
*/
int ich_init_opcodes()
int ich_init_opcodes(void)
{
int rc = 0;
OPCODES *curopcodes_done;
@ -429,8 +428,8 @@ static int ich7_run_opcode(OPCODE op, uint32_t offset,
opmenu = REGREAD32(ICH7_REG_OPMENU);
opmenu |= ((uint64_t)REGREAD32(ICH7_REG_OPMENU + 4)) << 32;
for (opcode_index=0; opcode_index<8; opcode_index++) {
if((opmenu & 0xff) == op.opcode) {
for (opcode_index = 0; opcode_index < 8; opcode_index++) {
if ((opmenu & 0xff) == op.opcode) {
break;
}
opmenu >>= 8;
@ -525,7 +524,6 @@ static int ich9_run_opcode(OPCODE op, uint32_t offset,
REGWRITE32(ICH9_REG_FDATA0 +
((a - 1) - ((a - 1) % 4)), temp32);
}
}
/* Assemble SSFS + SSFC */
@ -547,8 +545,8 @@ static int ich9_run_opcode(OPCODE op, uint32_t offset,
opmenu = REGREAD32(ICH9_REG_OPMENU);
opmenu |= ((uint64_t)REGREAD32(ICH9_REG_OPMENU + 4)) << 32;
for (opcode_index=0; opcode_index<8; opcode_index++) {
if((opmenu & 0xff) == op.opcode) {
for (opcode_index = 0; opcode_index < 8; opcode_index++) {
if ((opmenu & 0xff) == op.opcode) {
break;
}
opmenu >>= 8;

39
util/flashrom/m29f002.c
View File

@ -1,5 +1,5 @@
/*
* This file is part of flashrom.
* This file is part of the flashrom project.
*
* Copyright (C) 2009 Peter Stuge <peter@stuge.se>
*
@ -20,7 +20,8 @@
#include "flash.h"
int erase_m29f002(struct flashchip *flash) {
int erase_m29f002(struct flashchip *flash)
{
volatile uint8_t *bios = flash->virtual_memory;
chip_writeb(0xaa, bios + 0x555);
chip_writeb(0x55, bios + 0xaaa);
@ -33,7 +34,9 @@ int erase_m29f002(struct flashchip *flash) {
return 0;
}
static void rewrite_block(volatile uint8_t *bios, uint8_t *src, volatile uint8_t *dst, int size) {
static void rewrite_block(volatile uint8_t *bios, uint8_t *src,
volatile uint8_t *dst, int size)
{
/* erase */
chip_writeb(0xaa, bios + 0x555);
chip_writeb(0x55, bios + 0xaaa);
@ -56,13 +59,16 @@ static void rewrite_block(volatile uint8_t *bios, uint8_t *src, volatile uint8_t
}
}
static void do_block(volatile uint8_t *bios, uint8_t *src, int i, unsigned long start, int size) {
static void do_block(volatile uint8_t *bios, uint8_t *src, int i,
unsigned long start, int size)
{
printf("%d at address: 0x%08lx", i, start);
rewrite_block(bios, src + start, bios + start, size);
printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
}
int write_m29f002t(struct flashchip *flash, uint8_t *buf) {
int write_m29f002t(struct flashchip *flash, uint8_t *buf)
{
int i, page_size = flash->page_size;
volatile uint8_t *bios = flash->virtual_memory;
@ -73,17 +79,18 @@ int write_m29f002t(struct flashchip *flash, uint8_t *buf) {
printf("Programming block: ");
for (i = 0; i < 3; i++)
do_block(bios, buf, i, i*page_size, page_size);
do_block(bios, buf, i++, 0x30000, 32*1024);
do_block(bios, buf, i++, 0x38000, 8*1024);
do_block(bios, buf, i++, 0x3a000, 8*1024);
do_block(bios, buf, i, 0x3c000, 16*1024);
do_block(bios, buf, i, i * page_size, page_size);
do_block(bios, buf, i++, 0x30000, 32 * 1024);
do_block(bios, buf, i++, 0x38000, 8 * 1024);
do_block(bios, buf, i++, 0x3a000, 8 * 1024);
do_block(bios, buf, i, 0x3c000, 16 * 1024);
printf("\n");
return 0;
}
int write_m29f002b(struct flashchip *flash, uint8_t *buf) {
int write_m29f002b(struct flashchip *flash, uint8_t *buf)
{
int i = 0, page_size = flash->page_size;
volatile uint8_t *bios = flash->virtual_memory;
@ -93,12 +100,12 @@ int write_m29f002b(struct flashchip *flash, uint8_t *buf) {
*/
printf("Programming block: ");
do_block(bios, buf, i++, 0x00000, 16*1024);
do_block(bios, buf, i++, 0x04000, 8*1024);
do_block(bios, buf, i++, 0x06000, 8*1024);
do_block(bios, buf, i++, 0x08000, 32*1024);
do_block(bios, buf, i++, 0x00000, 16 * 1024);
do_block(bios, buf, i++, 0x04000, 8 * 1024);
do_block(bios, buf, i++, 0x06000, 8 * 1024);
do_block(bios, buf, i++, 0x08000, 32 * 1024);
for (; i < 7; i++)
do_block(bios, buf, i, (i-3)*page_size, page_size);
do_block(bios, buf, i, (i - 3) * page_size, page_size);
printf("\n");
return 0;

6
util/flashrom/physmap.c
View File

@ -16,6 +16,7 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <sys/types.h>
#include <sys/stat.h>
#include <fcntl.h>
@ -55,13 +56,14 @@ void *sys_physmap(unsigned long phys_addr, size_t len)
if (-1 == fd_mem) {
/* Open the memory device UNCACHED. Important for MMIO. */
if (-1 == (fd_mem = open(MEM_DEV, O_RDWR|O_SYNC))) {
if (-1 == (fd_mem = open(MEM_DEV, O_RDWR | O_SYNC))) {
perror("Critical error: open(" MEM_DEV ")");
exit(2);
}
}
virt_addr = mmap(0, len, PROT_WRITE|PROT_READ, MAP_SHARED, fd_mem, (off_t)phys_addr);
virt_addr = mmap(0, len, PROT_WRITE | PROT_READ, MAP_SHARED,
fd_mem, (off_t)phys_addr);
return MAP_FAILED == virt_addr ? NULL : virt_addr;
}

25
util/flashrom/spi.c
View File

@ -85,7 +85,7 @@ static int spi_res(unsigned char *readarr)
return 0;
}
int spi_write_enable()
int spi_write_enable(void)
{
const unsigned char cmd[JEDEC_WREN_OUTSIZE] = { JEDEC_WREN };
@ -93,7 +93,7 @@ int spi_write_enable()
return spi_command(sizeof(cmd), 0, cmd, NULL);
}
int spi_write_disable()
int spi_write_disable(void)
{
const unsigned char cmd[JEDEC_WRDI_OUTSIZE] = { JEDEC_WRDI };
@ -229,7 +229,7 @@ int probe_spi_res(struct flashchip *flash)
return 1;
}
uint8_t spi_read_status_register()
uint8_t spi_read_status_register(void)
{
const unsigned char cmd[JEDEC_RDSR_OUTSIZE] = { JEDEC_RDSR };
unsigned char readarr[2]; /* JEDEC_RDSR_INSIZE=1 but wbsio needs 2 */
@ -245,8 +245,7 @@ uint8_t spi_read_status_register()
return readarr[0];
}
/* Prettyprint the status register. Common definitions.
*/
/* Prettyprint the status register. Common definitions. */
void spi_prettyprint_status_register_common(uint8_t status)
{
printf_debug("Chip status register: Bit 5 / Block Protect 3 (BP3) is "
@ -501,7 +500,7 @@ int spi_sector_erase(const struct flashchip *flash, unsigned long addr)
return 0;
}
int spi_write_status_enable()
int spi_write_status_enable(void)
{
const unsigned char cmd[JEDEC_EWSR_OUTSIZE] = { JEDEC_EWSR };
@ -616,15 +615,17 @@ int spi_chip_write(struct flashchip *flash, uint8_t *buf)
return 1;
}
int spi_aai_write(struct flashchip *flash, uint8_t *buf) {
int spi_aai_write(struct flashchip *flash, uint8_t *buf)
{
uint32_t pos = 2, size = flash->total_size * 1024;
unsigned char w[6] = {0xad, 0, 0, 0, buf[0], buf[1]};
switch (flashbus) {
case BUS_TYPE_WBSIO_SPI:
fprintf(stderr, "%s: impossible with Winbond SPI masters, degrading to byte program\n", __func__);
return spi_chip_write(flash, buf);
default:
break;
case BUS_TYPE_WBSIO_SPI:
fprintf(stderr, "%s: impossible with Winbond SPI masters,"
" degrading to byte program\n", __func__);
return spi_chip_write(flash, buf);
default:
break;
}
flash->erase(flash);
spi_write_enable();

2
util/flashrom/udelay.c
View File

@ -31,7 +31,7 @@ void myusec_delay(int time)
for (i = 0; i < time * micro; i++) ;
}
void myusec_calibrate_delay()
void myusec_calibrate_delay(void)
{
int count = 1000;
unsigned long timeusec;

18
util/flashrom/wbsio_spi.c
View File

@ -29,13 +29,14 @@
static uint16_t wbsio_spibase = 0;
static uint16_t wbsio_get_spibase(uint16_t port) {
static uint16_t wbsio_get_spibase(uint16_t port)
{
uint8_t id;
uint16_t flashport = 0;
w836xx_ext_enter(port);
id = wbsio_read(port, 0x20);
if(id != 0xa0) {
if (id != 0xa0) {
fprintf(stderr, "\nW83627 not found at 0x%x, id=0x%02x want=0xa0.\n", port, id);
goto done;
}
@ -58,7 +59,8 @@ done:
return flashport;
}
int wbsio_check_for_spi(const char *name) {
int wbsio_check_for_spi(const char *name)
{
if (0 == (wbsio_spibase = wbsio_get_spibase(WBSIO_PORT1)))
if (0 == (wbsio_spibase = wbsio_get_spibase(WBSIO_PORT2)))
return 1;
@ -88,7 +90,9 @@ int wbsio_check_for_spi(const char *name) {
* Would one more byte of RAM in the chip (to get all 24 bits) really make
* such a big difference?
*/
int wbsio_spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr) {
int wbsio_spi_command(unsigned int writecnt, unsigned int readcnt,
const unsigned char *writearr, unsigned char *readarr)
{
int i;
uint8_t mode = 0;
@ -169,7 +173,8 @@ int wbsio_spi_command(unsigned int writecnt, unsigned int readcnt, const unsigne
return 0;
}
int wbsio_spi_read(struct flashchip *flash, uint8_t *buf) {
int wbsio_spi_read(struct flashchip *flash, uint8_t *buf)
{
int size = flash->total_size * 1024;
if (flash->total_size > 1024) {
@ -181,7 +186,8 @@ int wbsio_spi_read(struct flashchip *flash, uint8_t *buf) {
return 0;
}
int wbsio_spi_write(struct flashchip *flash, uint8_t *buf) {
int wbsio_spi_write(struct flashchip *flash, uint8_t *buf)
{
int pos, size = flash->total_size * 1024;
if (flash->total_size > 1024) {