devicetree: Discriminate device ops scan_bus()

Use of scan_static_bus() and tree traversals is somewhat convoluted.
Start cleaning this up by assigning each path type with separate
static scan_bus() function.

For ME, SMBus and LPC paths a bus cannot expose bridges, as those would
add to the number of encountered PCI buses.

Change-Id: I8bb11450516faad4fa33b8f69bce5b9978ec75e5
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/8534
Tested-by: build bot (Jenkins)
Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>

src/device/root_device.c

@@ -44,51 +44,69 @@ const char mainboard_name[] = CONFIG_MAINBOARD_VENDOR " " CONFIG_MAINBOARD_PART_
  * debug device. Those virtual devices have to be listed in the config
  * file under some static bus in order to be enumerated at run time.
  *
- * This function is the default scan_bus() method for the root device and
- * LPC bridges.
- *
  * @param bus Pointer to the device to which the static buses are attached to.
  * @param max Maximum bus number currently used before scanning.
  * @return The largest bus number used.
  */
-static int smbus_max = 0;
-unsigned int scan_static_bus(device_t bus, unsigned int max)
+
+static unsigned int scan_static_bus(device_t bus, unsigned int max)
 {
 	device_t child;
 	struct bus *link;
 
-	printk(BIOS_SPEW, "%s for %s\n", __func__, dev_path(bus));
-
 	for (link = bus->link_list; link; link = link->next) {
-		/* For SMBus bus enumerate. */
-		child = link->children;
-
-		if (child && child->path.type == DEVICE_PATH_I2C)
-			link->secondary = ++smbus_max;
-
 		for (child = link->children; child; child = child->sibling) {
+
 			if (child->chip_ops && child->chip_ops->enable_dev)
 				child->chip_ops->enable_dev(child);
 
 			if (child->ops && child->ops->enable)
 				child->ops->enable(child);
 
-			if (child->path.type == DEVICE_PATH_I2C) {
-				printk(BIOS_DEBUG, "smbus: %s[%d]->",
-				       dev_path(child->bus->dev),
-				       child->bus->link_num);
-			}
 			printk(BIOS_DEBUG, "%s %s\n", dev_path(child),
 			       child->enabled ? "enabled" : "disabled");
 		}
 	}
 
+	return max;
+}
+
+unsigned int scan_lpc_bus(device_t bus, unsigned int max)
+{
+	printk(BIOS_SPEW, "%s for %s\n", __func__, dev_path(bus));
+
+	max = scan_static_bus(bus, max);
+
+	printk(BIOS_SPEW, "%s for %s done\n", __func__, dev_path(bus));
+
+	return max;
+}
+
+unsigned int scan_smbus(device_t bus, unsigned int max)
+{
+	device_t child;
+	struct bus *link;
+	static int smbus_max = 0;
+
+	printk(BIOS_SPEW, "%s for %s\n", __func__, dev_path(bus));
+
 	for (link = bus->link_list; link; link = link->next) {
+
+		link->secondary = ++smbus_max;
+
 		for (child = link->children; child; child = child->sibling) {
-			if (!child->ops || !child->ops->scan_bus)
-				continue;
-			printk(BIOS_SPEW, "%s scanning...\n", dev_path(child));
-			max = scan_bus(child, max);
+
+			if (child->chip_ops && child->chip_ops->enable_dev)
+				child->chip_ops->enable_dev(child);
+
+			if (child->ops && child->ops->enable)
+				child->ops->enable(child);
+
+			printk(BIOS_DEBUG, "smbus: %s[%d]->", dev_path(child->bus->dev),
+			       child->bus->link_num);
+
+			printk(BIOS_DEBUG, "%s %s\n", dev_path(child),
+			       child->enabled ? "enabled" : "disabled");
 		}
 	}
 
@@ -106,9 +124,27 @@ unsigned int scan_static_bus(device_t bus, unsigned int max)
  * @param max The current bus number scanned so far, usually 0x00.
  * @return The largest bus number used.
  */
-static unsigned int root_dev_scan_bus(device_t root, unsigned int max)
+static unsigned int root_dev_scan_bus(device_t bus, unsigned int max)
 {
-	return scan_static_bus(root, max);
+	device_t child;
+	struct bus *link;
+
+	printk(BIOS_SPEW, "%s for %s\n", __func__, dev_path(bus));
+
+	max = scan_static_bus(bus, max);
+
+	for (link = bus->link_list; link; link = link->next) {
+		for (child = link->children; child; child = child->sibling) {
+			if (!child->ops || !child->ops->scan_bus)
+				continue;
+			printk(BIOS_SPEW, "%s scanning...\n", dev_path(child));
+			max = scan_bus(child, max);
+		}
+	}
+
+	printk(BIOS_SPEW, "%s for %s done\n", __func__, dev_path(bus));
+
+	return max;
 }
 
 static void root_dev_reset(struct bus *bus)

src/drivers/i2c/i2cmux/i2cmux.c

@@ -1,10 +1,5 @@
-#include <console/console.h>
 #include <device/device.h>
 #include <device/smbus.h>
-#include <device/pci.h>
-#include <device/pci_ids.h>
-#include <device/pci_ops.h>
-#include <cpu/x86/msr.h>
 
 static void i2cmux_set_link(struct device *dev, unsigned int link)
 {
@@ -21,7 +16,7 @@ static struct device_operations i2cmux_operations = {
 	.set_resources = DEVICE_NOOP,
 	.enable_resources = DEVICE_NOOP,
 	.init = DEVICE_NOOP,
-	.scan_bus = scan_static_bus,
+	.scan_bus = scan_smbus,
 	.set_link = i2cmux_set_link,
 };
 

src/drivers/i2c/i2cmux2/i2cmux2.c

@@ -1,10 +1,5 @@
-#include <console/console.h>
 #include <device/device.h>
 #include <device/smbus.h>
-#include <device/pci.h>
-#include <device/pci_ids.h>
-#include <device/pci_ops.h>
-#include <cpu/x86/msr.h>
 
 static void i2cmux2_set_link(struct device *dev, unsigned int link)
 {
@@ -20,7 +15,7 @@ static struct device_operations i2cmux2_operations = {
 	.set_resources = DEVICE_NOOP,
 	.enable_resources = DEVICE_NOOP,
 	.init = DEVICE_NOOP,
-	.scan_bus = scan_static_bus,
+	.scan_bus = scan_smbus,
 	.set_link = i2cmux2_set_link,
 };
 

src/include/device/device.h

@@ -224,11 +224,12 @@ void show_all_devs_resources(int debug_level, const char* msg);
 extern struct device_operations default_dev_ops_root;
 void pci_domain_read_resources(struct device *dev);
 unsigned int pci_domain_scan_bus(struct device *dev, unsigned int _max);
-unsigned int scan_static_bus(device_t bus, unsigned int _max);
 
 void fixed_mem_resource(device_t dev, unsigned long index,
 		  unsigned long basek, unsigned long sizek, unsigned long type);
 
+unsigned int scan_smbus(device_t bus, unsigned int _max);
+unsigned int scan_lpc_bus(device_t bus, unsigned int _max);
 
 /* It is the caller's responsibility to adjust regions such that ram_resource()
  * and mmio_resource() do not overlap.

src/mainboard/lippert/frontrunner/devicetree.cb

@@ -6,10 +6,10 @@ chip northbridge/amd/gx2
 	end
 
 	device domain 0 on
-		device pci 0.0 on end
+		device pci 0.0 on
 			chip southbridge/amd/cs5535
-			register "setupflash" = "0"
-				device pci 12.0 on
+				register "setupflash" = "0"
+				device pci 12.0 on end
 				device pci 12.1 off end		# SMI
 				device pci 12.2 on end		# IDE
 				device pci 12.3 off end		# Audio

src/northbridge/via/cx700/lpc.c

@@ -297,7 +297,7 @@ static struct device_operations cx700_lpc_ops = {
 	.set_resources = cx700_set_resources,
 	.enable_resources = cx700_enable_resources,
 	.init = cx700_lpc_init,
-	.scan_bus = scan_static_bus,
+	.scan_bus = scan_lpc_bus,
 };
 
 static const struct pci_driver lpc_driver __pci_driver = {

src/northbridge/via/vx800/lpc.c

@@ -362,7 +362,7 @@ static struct device_operations vx800_lpc_ops = {
 	.set_resources = vx800_set_resources,
 	.enable_resources = pci_dev_enable_resources,
 	.init = southbridge_init,
-	.scan_bus = scan_static_bus,
+	.scan_bus = scan_lpc_bus,
 };
 
 static const struct pci_driver lpc_driver __pci_driver = {

src/northbridge/via/vx900/lpc.c

@@ -192,7 +192,7 @@ static struct device_operations vx900_lpc_ops = {
 	.set_resources = pci_dev_set_resources,
 	.enable_resources = pci_dev_enable_resources,
 	.init = vx900_lpc_init,
-	.scan_bus = scan_static_bus,
+	.scan_bus = scan_lpc_bus,
 };
 
 static const struct pci_driver lpc_driver __pci_driver = {

src/northbridge/via/vx900/traf_ctrl.c

@@ -134,8 +134,9 @@ static struct device_operations traf_ctrl_ops = {
 	.set_resources = pci_dev_set_resources,
 	.enable_resources = pci_dev_enable_resources,
 	.init = vx900_traf_ctr_init,
-	/* Need this here, or the IOAPIC driver won't be called */
-	.scan_bus = scan_static_bus,
+	/* Need this here, or the IOAPIC driver won't be called.
+	 * FIXME: Technically not a LPC bus. */
+	.scan_bus = scan_lpc_bus,
 };
 
 static const struct pci_driver traf_ctrl_driver __pci_driver = {

src/soc/intel/baytrail/southcluster.c

@@ -546,7 +546,7 @@ static struct device_operations device_ops = {
 	.enable_resources	= NULL,
 	.init			= sc_init,
 	.enable			= southcluster_enable_dev,
-	.scan_bus		= scan_static_bus,
+	.scan_bus		= scan_lpc_bus,
 	.ops_pci		= &soc_pci_ops,
 };
 

src/soc/intel/broadwell/lpc.c

@@ -643,7 +643,7 @@ static struct device_operations device_ops = {
 	.acpi_inject_dsdt_generator = southcluster_inject_dsdt,
 	.write_acpi_tables      = acpi_write_hpet,
 	.init			= &lpc_init,
-	.scan_bus		= &scan_static_bus,
+	.scan_bus		= &scan_lpc_bus,
 	.ops_pci		= &broadwell_pci_ops,
 };
 

src/soc/intel/broadwell/smbus.c

@@ -94,7 +94,7 @@ static struct device_operations smbus_ops = {
 	.read_resources		= &smbus_read_resources,
 	.set_resources		= &pci_dev_set_resources,
 	.enable_resources	= &pci_dev_enable_resources,
-	.scan_bus		= &scan_static_bus,
+	.scan_bus		= &scan_smbus,
 	.init			= &pch_smbus_init,
 	.ops_smbus_bus		= &lops_smbus_bus,
 	.ops_pci		= &broadwell_pci_ops,

src/soc/intel/fsp_baytrail/southcluster.c

@@ -607,7 +607,7 @@ static struct device_operations device_ops = {
 	.enable_resources	= NULL,
 	.init			= sc_init,
 	.enable			= southcluster_enable_dev,
-	.scan_bus		= scan_static_bus,
+	.scan_bus		= scan_lpc_bus,
 	.ops_pci		= &soc_pci_ops,
 };
 

src/southbridge/amd/agesa/hudson/lpc.c

@@ -333,7 +333,7 @@ static struct device_operations lpc_ops = {
 #endif
 	.enable_resources = hudson_lpc_enable_resources,
 	.init = lpc_init,
-	.scan_bus = scan_static_bus,
+	.scan_bus = scan_lpc_bus,
 	.ops_pci = &lops_pci,
 };
 static const struct pci_driver lpc_driver __pci_driver = {

src/southbridge/amd/agesa/hudson/sm.c

@@ -163,7 +163,7 @@ static struct device_operations smbus_ops = {
 	.set_resources = hudson_sm_set_resources,
 	.enable_resources = pci_dev_enable_resources,
 	.init = sm_init,
-	.scan_bus = scan_static_bus,
+	.scan_bus = scan_smbus,
 	.ops_pci = &lops_pci,
 	.ops_smbus_bus = &lops_smbus_bus,
 };

src/southbridge/amd/amd8111/acpi.c

@@ -226,7 +226,7 @@ static struct device_operations acpi_ops  = {
 	.set_resources    = pci_dev_set_resources,
 	.enable_resources = acpi_enable_resources,
 	.init             = acpi_init,
-	.scan_bus         = scan_static_bus,
+	.scan_bus         = scan_smbus,
 	/*  We don't need amd8111_enable, chip ops takes care of it.
 	 *  It could be useful if these devices were not
 	 *  enabled by default.

src/southbridge/amd/amd8111/lpc.c

@@ -151,7 +151,7 @@ static struct device_operations lpc_ops  = {
 	.write_acpi_tables      = acpi_write_hpet,
 	.acpi_fill_ssdt_generator = southbridge_acpi_fill_ssdt_generator,
 #endif
-	.scan_bus         = scan_static_bus,
+	.scan_bus         = scan_lpc_bus,
 	.enable           = amd8111_enable,
 	.ops_pci          = &lops_pci,
 };

src/southbridge/amd/amd8111/smbus.c

@@ -28,7 +28,7 @@ static struct device_operations smbus_ops = {
 	.set_resources    = pci_dev_set_resources,
 	.enable_resources = pci_dev_enable_resources,
 	.init             = 0,
-	.scan_bus         = scan_static_bus,
+	.scan_bus         = scan_smbus,
 	.enable           = amd8111_enable,
 	.ops_pci          = &lops_pci,
 	.ops_smbus_bus    = &lops_smbus_bus,

src/southbridge/amd/amd8111/usb.c

@@ -25,8 +25,6 @@ static struct device_operations usb_ops = {
 	.set_resources    = pci_dev_set_resources,
 	.enable_resources = pci_dev_enable_resources,
 	.init             = 0,
-	.scan_bus         = scan_static_bus,
-//	.enable           = amd8111_enable,
 	.ops_pci          = &lops_pci,
 };
 

src/southbridge/amd/cimx/sb700/late.c

@@ -111,7 +111,7 @@ static struct device_operations lpc_ops = {
 	.write_acpi_tables = acpi_write_hpet,
 #endif
 	.init = lpc_init,
-	.scan_bus = scan_static_bus,
+	.scan_bus = scan_lpc_bus,
 	.ops_pci = &lops_pci,
 };
 

src/southbridge/amd/cimx/sb800/late.c

@@ -161,7 +161,7 @@ static struct device_operations lpc_ops = {
 	.write_acpi_tables = acpi_write_hpet,
 #endif
         .init = lpc_init,
-        .scan_bus = scan_static_bus,
+        .scan_bus = scan_lpc_bus,
         .ops_pci = &lops_pci,
 };
 

src/southbridge/amd/cimx/sb900/late.c

@@ -132,7 +132,7 @@ static struct device_operations lpc_ops = {
 #if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
 	.write_acpi_tables = acpi_write_hpet,
 #endif
-        .scan_bus = scan_static_bus,
+        .scan_bus = scan_lpc_bus,
         .ops_pci = &lops_pci,
 };
 

src/southbridge/amd/cs5535/cs5535.c

@@ -94,7 +94,6 @@ static struct device_operations southbridge_ops = {
 	.enable_resources = pci_dev_enable_resources,
 	.init             = southbridge_init,
 	.enable           = southbridge_enable,
-	.scan_bus         = scan_static_bus,
 };
 
 static const struct pci_driver cs5535_pci_driver __pci_driver = {

src/southbridge/amd/cs5536/cs5536.c

@@ -688,13 +688,18 @@ static struct smbus_bus_operations lops_smbus_bus = {
 	.read_byte  = lsmbus_read_byte,
 };
 
+static unsigned int scan_lpc_smbus(device_t dev, unsigned int max)
+{
+	/* FIXME. Do we have mixed LPC/SMBus device node here. */
+	return scan_smbus(dev, max);
+}
+
 static struct device_operations southbridge_ops = {
 	.read_resources = cs5536_read_resources,
 	.set_resources = pci_dev_set_resources,
 	.enable_resources = pci_dev_enable_resources,
 	.init = southbridge_init,
-//      .enable                   = southbridge_enable,
-	.scan_bus = scan_static_bus,
+	.scan_bus = scan_lpc_smbus,
 	.ops_smbus_bus = &lops_smbus_bus,
 };
 

src/southbridge/amd/pi/hudson/lpc.c

@@ -340,7 +340,7 @@ static struct device_operations lpc_ops = {
 	.write_acpi_tables = acpi_write_hpet,
 #endif
 	.init = lpc_init,
-	.scan_bus = scan_static_bus,
+	.scan_bus = scan_lpc_bus,
 	.ops_pci = &lops_pci,
 };
 static const struct pci_driver lpc_driver __pci_driver = {

src/southbridge/amd/pi/hudson/sm.c

@@ -163,7 +163,7 @@ static struct device_operations smbus_ops = {
 	.set_resources = hudson_sm_set_resources,
 	.enable_resources = pci_dev_enable_resources,
 	.init = sm_init,
-	.scan_bus = scan_static_bus,
+	.scan_bus = scan_smbus,
 	.ops_pci = &lops_pci,
 	.ops_smbus_bus = &lops_smbus_bus,
 };

src/southbridge/amd/sb600/lpc.c

@@ -242,7 +242,7 @@ static struct device_operations lpc_ops = {
 	.acpi_fill_ssdt_generator = southbridge_acpi_fill_ssdt_generator,
 #endif
 	.init = lpc_init,
-	.scan_bus = scan_static_bus,
+	.scan_bus = scan_lpc_bus,
 	/* .enable           = sb600_enable, */
 	.ops_pci = &lops_pci,
 };

src/southbridge/amd/sb600/sm.c

@@ -361,7 +361,7 @@ static struct device_operations smbus_ops = {
 	.set_resources = sb600_sm_set_resources,
 	.enable_resources = pci_dev_enable_resources,
 	.init = sm_init,
-	.scan_bus = scan_static_bus,
+	.scan_bus = scan_smbus,
 	/* .enable           = sb600_enable, */
 	.ops_pci = &lops_pci,
 	.ops_smbus_bus = &lops_smbus_bus,

src/southbridge/amd/sb700/lpc.c

@@ -287,7 +287,7 @@ static struct device_operations lpc_ops = {
 	.acpi_fill_ssdt_generator = southbridge_acpi_fill_ssdt_generator,
 #endif
 	.init = lpc_init,
-	.scan_bus = scan_static_bus,
+	.scan_bus = scan_lpc_bus,
 	.ops_pci = &lops_pci,
 };
 static const struct pci_driver lpc_driver __pci_driver = {

src/southbridge/amd/sb700/sm.c

@@ -452,7 +452,7 @@ static struct device_operations smbus_ops = {
 	.set_resources = sb700_sm_set_resources,
 	.enable_resources = pci_dev_enable_resources,
 	.init = sm_init,
-	.scan_bus = scan_static_bus,
+	.scan_bus = scan_smbus,
 	.ops_pci = &lops_pci,
 	.ops_smbus_bus = &lops_smbus_bus,
 };

src/southbridge/amd/sb800/lpc.c

@@ -254,7 +254,7 @@ static struct device_operations lpc_ops = {
 	.write_acpi_tables      = acpi_write_hpet,
 #endif
 	.init = lpc_init,
-	.scan_bus = scan_static_bus,
+	.scan_bus = scan_lpc_bus,
 	.ops_pci = &lops_pci,
 };
 static const struct pci_driver lpc_driver __pci_driver = {

src/southbridge/amd/sb800/sm.c

@@ -343,7 +343,7 @@ static struct device_operations smbus_ops = {
 	.set_resources = sb800_sm_set_resources,
 	.enable_resources = pci_dev_enable_resources,
 	.init = sm_init,
-	.scan_bus = scan_static_bus,
+	.scan_bus = scan_smbus,
 	.ops_pci = &lops_pci,
 	.ops_smbus_bus = &lops_smbus_bus,
 };

src/southbridge/broadcom/bcm5785/lpc.c

@@ -135,7 +135,7 @@ static struct device_operations lpc_ops  = {
 	.set_resources    = pci_dev_set_resources,
 	.enable_resources = bcm5785_lpc_enable_resources,
 	.init             = lpc_init,
-	.scan_bus         = scan_static_bus,
+	.scan_bus         = scan_lpc_bus,
 //	.enable           = bcm5785_enable,
 	.ops_pci          = &lops_pci,
 };

src/southbridge/broadcom/bcm5785/sb_pci_main.c

@@ -154,7 +154,7 @@ static struct device_operations sb_ops = {
         .set_resources    = pci_dev_set_resources,
         .enable_resources = pci_dev_enable_resources,
         .init             = sb_init,
-        .scan_bus         = scan_static_bus,
+        .scan_bus         = scan_smbus,
 //        .enable           = bcm5785_enable,
         .ops_pci          = &lops_pci,
         .ops_smbus_bus    = &lops_smbus_bus,

src/southbridge/dmp/vortex86ex/southbridge.c

@@ -619,7 +619,7 @@ static struct device_operations vortex_sb_ops = {
 	.set_resources    = pci_dev_set_resources,
 	.enable_resources = pci_dev_enable_resources,
 	.init             = &southbridge_init,
-	.scan_bus         = scan_static_bus,
+	.scan_bus         = scan_lpc_bus,
 	.enable           = 0,
 	.ops_pci          = 0,
 };

src/southbridge/intel/bd82x6x/lpc.c

@@ -827,7 +827,7 @@ static struct device_operations device_ops = {
 	.init			= lpc_init,
 	.final			= lpc_final,
 	.enable			= pch_lpc_enable,
-	.scan_bus		= scan_static_bus,
+	.scan_bus		= scan_lpc_bus,
 	.ops_pci		= &pci_ops,
 };
 

src/southbridge/intel/bd82x6x/me.c

@@ -760,7 +760,6 @@ static struct device_operations device_ops = {
 	.set_resources		= pci_dev_set_resources,
 	.enable_resources	= pci_dev_enable_resources,
 	.init			= intel_me_init,
-	.scan_bus		= scan_static_bus,
 	.ops_pci		= &pci_ops,
 };
 

src/southbridge/intel/bd82x6x/me_8.x.c

@@ -763,7 +763,6 @@ static struct device_operations device_ops = {
 	.set_resources		= pci_dev_set_resources,
 	.enable_resources	= pci_dev_enable_resources,
 	.init			= intel_me_init,
-	.scan_bus		= scan_static_bus,
 	.ops_pci		= &pci_ops,
 };
 

src/southbridge/intel/bd82x6x/smbus.c

@@ -151,7 +151,7 @@ static struct device_operations smbus_ops = {
 	.read_resources		= smbus_read_resources,
 	.set_resources		= pci_dev_set_resources,
 	.enable_resources	= pci_dev_enable_resources,
-	.scan_bus		= scan_static_bus,
+	.scan_bus		= scan_smbus,
 	.init			= pch_smbus_init,
 	.ops_smbus_bus		= &lops_smbus_bus,
 	.ops_pci		= &smbus_pci_ops,

src/southbridge/intel/esb6300/lpc.c

@@ -362,7 +362,7 @@ static struct device_operations lpc_ops  = {
 	.set_resources    = pci_dev_set_resources,
 	.enable_resources = esb6300_lpc_enable_resources,
 	.init             = lpc_init,
-	.scan_bus         = scan_static_bus,
+	.scan_bus         = scan_lpc_bus,
 	.enable           = esb6300_enable,
 	.ops_pci          = &lops_pci,
 };

src/southbridge/intel/esb6300/smbus.c

@@ -35,7 +35,7 @@ static struct device_operations smbus_ops = {
 	.set_resources    = pci_dev_set_resources,
 	.enable_resources = pci_dev_enable_resources,
 	.init             = 0,
-	.scan_bus         = scan_static_bus,
+	.scan_bus         = scan_smbus,
 	.enable           = esb6300_enable,
 	.ops_pci          = &lops_pci,
 	.ops_smbus_bus    = &lops_smbus_bus,

src/southbridge/intel/fsp_bd82x6x/lpc.c

@@ -761,7 +761,7 @@ static struct device_operations device_ops = {
 	.acpi_inject_dsdt_generator = southbridge_inject_dsdt,
 	.init			= lpc_init,
 	.enable			= pch_lpc_enable,
-	.scan_bus		= scan_static_bus,
+	.scan_bus		= scan_lpc_bus,
 	.ops_pci		= &pci_ops,
 };
 

src/southbridge/intel/fsp_bd82x6x/me.c

@@ -759,7 +759,6 @@ static struct device_operations device_ops = {
 	.set_resources		= pci_dev_set_resources,
 	.enable_resources	= pci_dev_enable_resources,
 	.init			= intel_me_init,
-	.scan_bus		= scan_static_bus,
 	.ops_pci		= &pci_ops,
 };
 

src/southbridge/intel/fsp_bd82x6x/me_8.x.c

@@ -762,7 +762,6 @@ static struct device_operations device_ops = {
 	.set_resources		= pci_dev_set_resources,
 	.enable_resources	= pci_dev_enable_resources,
 	.init			= intel_me_init,
-	.scan_bus		= scan_static_bus,
 	.ops_pci		= &pci_ops,
 };
 

src/southbridge/intel/fsp_rangeley/lpc.c

@@ -463,7 +463,7 @@ static struct device_operations device_ops = {
 	.write_acpi_tables      = acpi_write_hpet,
 	.acpi_inject_dsdt_generator = southbridge_inject_dsdt,
 	.enable			= soc_lpc_enable,
-	.scan_bus		= scan_static_bus,
+	.scan_bus		= scan_lpc_bus,
 	.ops_pci		= &pci_ops,
 };
 

src/southbridge/intel/fsp_rangeley/smbus.c

@@ -87,7 +87,7 @@ static struct device_operations smbus_ops = {
 	.set_resources		= pci_dev_set_resources,
 	.enable_resources	= pci_dev_enable_resources,
 	.init			= 0,
-	.scan_bus		= scan_static_bus,
+	.scan_bus		= scan_smbus,
 	.ops_smbus_bus		= &lops_smbus_bus,
 	.ops_pci		= &smbus_pci_ops,
 };

src/southbridge/intel/i3100/lpc.c

@@ -457,7 +457,7 @@ static struct device_operations lpc_ops  = {
 #if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
 	.write_acpi_tables      = acpi_write_hpet,
 #endif
-	.scan_bus         = scan_static_bus,
+	.scan_bus         = scan_lpc_bus,
 	.enable           = i3100_enable,
 	.ops_pci          = &lops_pci,
 };

src/southbridge/intel/i3100/smbus.c

@@ -74,7 +74,7 @@ static struct device_operations smbus_ops = {
 	.set_resources    = pci_dev_set_resources,
 	.enable_resources = pci_dev_enable_resources,
 	.init             = 0,
-	.scan_bus         = scan_static_bus,
+	.scan_bus         = scan_smbus,
 	.enable           = i3100_enable,
 	.ops_pci          = &lops_pci,
 	.ops_smbus_bus    = &lops_smbus_bus,

src/southbridge/intel/i82371eb/isa.c

@@ -145,7 +145,7 @@ static const struct device_operations isa_ops = {
 	.acpi_fill_ssdt_generator = southbridge_acpi_fill_ssdt_generator,
 #endif
 	.init			= isa_init,
-	.scan_bus		= scan_static_bus,	/* TODO: Needed? */
+	.scan_bus		= scan_lpc_bus,	/* TODO: Needed? */
 	.enable			= 0,
 	.ops_pci		= 0, /* No subsystem IDs on 82371EB! */
 };

src/southbridge/intel/i82371eb/smbus.c

@@ -121,7 +121,7 @@ static const struct device_operations smbus_ops = {
 	.set_resources		= pci_dev_set_resources,
 	.enable_resources	= pci_dev_enable_resources,
 	.init			= 0,
-	.scan_bus		= scan_static_bus,
+	.scan_bus		= scan_smbus,
 	.enable			= pwrmgt_enable,
 	.ops_pci		= 0, /* No subsystem IDs on 82371EB! */
 	.ops_smbus_bus		= &lops_smbus_bus,

src/southbridge/intel/i82801ax/lpc.c

@@ -286,7 +286,7 @@ static struct device_operations lpc_ops = {
 	.set_resources		= pci_dev_set_resources,
 	.enable_resources	= pci_dev_enable_resources,
 	.init			= lpc_init,
-	.scan_bus		= scan_static_bus,
+	.scan_bus		= scan_lpc_bus,
 	.enable			= i82801ax_enable,
 };
 

src/southbridge/intel/i82801ax/smbus.c

@@ -48,7 +48,7 @@ static const struct device_operations smbus_ops = {
 	.set_resources		= pci_dev_set_resources,
 	.enable_resources	= pci_dev_enable_resources,
 	.init			= 0,
-	.scan_bus		= scan_static_bus,
+	.scan_bus		= scan_smbus,
 	.enable			= i82801ax_enable,
 	.ops_smbus_bus		= &lops_smbus_bus,
 };

src/southbridge/intel/i82801bx/lpc.c

@@ -304,7 +304,7 @@ static struct device_operations lpc_ops = {
 	.set_resources		= pci_dev_set_resources,
 	.enable_resources	= pci_dev_enable_resources,
 	.init			= lpc_init,
-	.scan_bus		= scan_static_bus,
+	.scan_bus		= scan_lpc_bus,
 	.enable			= i82801bx_enable,
 };
 

src/southbridge/intel/i82801bx/smbus.c

@@ -48,7 +48,7 @@ static const struct device_operations smbus_ops = {
 	.set_resources		= pci_dev_set_resources,
 	.enable_resources	= pci_dev_enable_resources,
 	.init			= 0,
-	.scan_bus		= scan_static_bus,
+	.scan_bus		= scan_smbus,
 	.enable			= i82801bx_enable,
 	.ops_smbus_bus		= &lops_smbus_bus,
 };

src/southbridge/intel/i82801cx/lpc.c

@@ -230,7 +230,7 @@ static struct device_operations lpc_ops  = {
 	.set_resources    = pci_dev_set_resources,
 	.enable_resources = pci_dev_enable_resources,
 	.init             = lpc_init,
-	.scan_bus         = scan_static_bus,
+	.scan_bus         = scan_lpc_bus,
 	.enable           = 0,
 };
 

src/southbridge/intel/i82801dx/lpc.c

@@ -336,7 +336,7 @@ static struct device_operations lpc_ops = {
 	.set_resources		= pci_dev_set_resources,
 	.enable_resources	= pci_dev_enable_resources,
 	.init			= lpc_init,
-	.scan_bus		= scan_static_bus,
+	.scan_bus		= scan_lpc_bus,
 	.enable			= i82801dx_enable,
 };
 

src/southbridge/intel/i82801ex/lpc.c

@@ -369,7 +369,7 @@ static struct device_operations lpc_ops  = {
 	.set_resources    = pci_dev_set_resources,
 	.enable_resources = i82801ex_lpc_enable_resources,
 	.init             = lpc_init,
-	.scan_bus         = scan_static_bus,
+	.scan_bus         = scan_lpc_bus,
 	.enable           = i82801ex_enable,
 	.ops_pci          = &lops_pci,
 };

src/southbridge/intel/i82801ex/smbus.c

@@ -35,7 +35,7 @@ static struct device_operations smbus_ops = {
 	.set_resources    = pci_dev_set_resources,
 	.enable_resources = pci_dev_enable_resources,
 	.init             = 0,
-	.scan_bus         = scan_static_bus,
+	.scan_bus         = scan_smbus,
 	.enable           = i82801ex_enable,
 	.ops_pci          = &lops_pci,
 	.ops_smbus_bus    = &lops_smbus_bus,

src/southbridge/intel/i82801gx/lpc.c

@@ -667,7 +667,7 @@ static struct device_operations device_ops = {
 	.acpi_inject_dsdt_generator = southbridge_inject_dsdt,
 	.write_acpi_tables      = acpi_write_hpet,
 	.init			= lpc_init,
-	.scan_bus		= scan_static_bus,
+	.scan_bus		= scan_lpc_bus,
 	.enable			= i82801gx_enable,
 	.ops_pci		= &pci_ops,
 };

src/southbridge/intel/i82801gx/smbus.c

@@ -258,7 +258,7 @@ static struct device_operations smbus_ops = {
 	.read_resources		= smbus_read_resources,
 	.set_resources		= pci_dev_set_resources,
 	.enable_resources	= pci_dev_enable_resources,
-	.scan_bus		= scan_static_bus,
+	.scan_bus		= scan_smbus,
 	.enable			= i82801gx_enable,
 	.ops_smbus_bus		= &lops_smbus_bus,
 	.ops_pci		= &smbus_pci_ops,

src/southbridge/intel/i82801ix/lpc.c

@@ -582,7 +582,7 @@ static struct device_operations device_ops = {
 	.write_acpi_tables      = acpi_write_hpet,
 	.acpi_fill_ssdt_generator = southbridge_fill_ssdt,
 	.init			= lpc_init,
-	.scan_bus		= scan_static_bus,
+	.scan_bus		= scan_lpc_bus,
 	.ops_pci		= &pci_ops,
 };
 

src/southbridge/intel/i82801ix/smbus.c

@@ -101,7 +101,7 @@ static struct device_operations smbus_ops = {
 	.read_resources		= smbus_read_resources,
 	.set_resources		= pci_dev_set_resources,
 	.enable_resources	= pci_dev_enable_resources,
-	.scan_bus		= scan_static_bus,
+	.scan_bus		= scan_smbus,
 	.init			= pch_smbus_init,
 	.ops_smbus_bus		= &lops_smbus_bus,
 	.ops_pci		= &smbus_pci_ops,

src/southbridge/intel/ibexpeak/lpc.c

@@ -805,7 +805,7 @@ static struct device_operations device_ops = {
 	.write_acpi_tables      = acpi_write_hpet,
 	.init			= lpc_init,
 	.enable			= pch_lpc_enable,
-	.scan_bus		= scan_static_bus,
+	.scan_bus		= scan_lpc_bus,
 	.ops_pci		= &pci_ops,
 };
 

src/southbridge/intel/ibexpeak/me.c

@@ -634,7 +634,6 @@ static struct device_operations device_ops = {
 	.set_resources		= pci_dev_set_resources,
 	.enable_resources	= pci_dev_enable_resources,
 	.init			= intel_me_init,
-	.scan_bus		= scan_static_bus,
 	.ops_pci		= &pci_ops,
 };
 

src/southbridge/intel/ibexpeak/smbus.c

@@ -108,7 +108,7 @@ static struct device_operations smbus_ops = {
 	.read_resources		= smbus_read_resources,
 	.set_resources		= pci_dev_set_resources,
 	.enable_resources	= pci_dev_enable_resources,
-	.scan_bus		= scan_static_bus,
+	.scan_bus		= scan_smbus,
 	.init			= pch_smbus_init,
 	.ops_smbus_bus		= &lops_smbus_bus,
 	.ops_pci		= &smbus_pci_ops,

src/southbridge/intel/lynxpoint/lpc.c

@@ -834,7 +834,7 @@ static struct device_operations device_ops = {
 	.write_acpi_tables      = southbridge_write_acpi_tables,
 	.init			= lpc_init,
 	.enable			= pch_lpc_enable,
-	.scan_bus		= scan_static_bus,
+	.scan_bus		= scan_lpc_bus,
 	.ops_pci		= &pci_ops,
 };
 

src/southbridge/intel/lynxpoint/smbus.c

@@ -155,7 +155,7 @@ static struct device_operations smbus_ops = {
 	.read_resources		= smbus_read_resources,
 	.set_resources		= pci_dev_set_resources,
 	.enable_resources	= pci_dev_enable_resources,
-	.scan_bus		= scan_static_bus,
+	.scan_bus		= scan_smbus,
 	.init			= pch_smbus_init,
 	.ops_smbus_bus		= &lops_smbus_bus,
 	.ops_pci		= &smbus_pci_ops,

src/southbridge/intel/sch/lpc.c

@@ -222,7 +222,7 @@ static struct device_operations device_ops = {
 	.acpi_inject_dsdt_generator = southbridge_inject_dsdt,
 	.write_acpi_tables      = acpi_write_hpet,
 	.init			= lpc_init,
-	.scan_bus		= scan_static_bus,
+	.scan_bus		= scan_lpc_bus,
 	.ops_pci		= &pci_ops,
 };
 

src/southbridge/intel/sch/smbus.c

@@ -65,7 +65,7 @@ static struct device_operations smbus_ops = {
 	.set_resources		= pci_dev_set_resources,
 	.enable_resources	= pci_dev_enable_resources,
 	.init			= 0,
-	.scan_bus		= scan_static_bus,
+	.scan_bus		= scan_smbus,
 	.ops_smbus_bus		= &lops_smbus_bus,
 	.ops_pci		= &smbus_pci_ops,
 };

src/southbridge/nvidia/ck804/lpc.c

@@ -329,7 +329,7 @@ static struct device_operations lpc_ops = {
 	.write_acpi_tables      = acpi_write_hpet,
 #endif
 	.init             = lpc_init,
-	.scan_bus         = scan_static_bus,
+	.scan_bus         = scan_lpc_bus,
 	.ops_pci          = &ck804_pci_ops,
 };
 

src/southbridge/nvidia/ck804/smbus.c

@@ -96,7 +96,7 @@ static struct device_operations smbus_ops = {
 	.set_resources    = pci_dev_set_resources,
 	.enable_resources = pci_dev_enable_resources,
 	.init             = 0,
-	.scan_bus         = scan_static_bus,
+	.scan_bus         = scan_smbus,
 	.ops_pci          = &ck804_pci_ops,
 	.ops_smbus_bus    = &lops_smbus_bus,
 };

src/southbridge/nvidia/mcp55/lpc.c

@@ -261,7 +261,7 @@ static struct device_operations lpc_ops = {
 	.set_resources    = pci_dev_set_resources,
 	.enable_resources = mcp55_lpc_enable_resources,
 	.init             = lpc_init,
-	.scan_bus         = scan_static_bus,
+	.scan_bus         = scan_lpc_bus,
 //	.enable           = mcp55_enable,
 	.ops_pci          = &mcp55_pci_ops,
 };

src/southbridge/nvidia/mcp55/smbus.c

@@ -127,7 +127,7 @@ static struct device_operations smbus_ops = {
 	.set_resources	= pci_dev_set_resources,
 	.enable_resources	= pci_dev_enable_resources,
 	.init		= mcp55_sm_init,
-	.scan_bus	= scan_static_bus,
+	.scan_bus	= scan_smbus,
 //	.enable		= mcp55_enable,
 	.ops_pci	= &mcp55_pci_ops,
 	.ops_smbus_bus	= &lops_smbus_bus,

src/southbridge/rdc/r8610/r8610.c

@@ -105,7 +105,6 @@ static struct device_operations r8610_sb_ops = {
 	.set_resources    = pci_dev_set_resources,
 	.enable_resources = pci_dev_enable_resources,
 	.init		  = &southbridge_init,
-	.scan_bus	  = scan_static_bus,
 	.enable           = 0,
 	.ops_pci          = 0,
 };

src/southbridge/sis/sis966/lpc.c

@@ -259,7 +259,7 @@ static struct device_operations lpc_ops  = {
 	.set_resources	= pci_dev_set_resources,
 	.enable_resources	= sis966_lpc_enable_resources,
 	.init		= lpc_init,
-	.scan_bus	= scan_static_bus,
+	.scan_bus	= scan_lpc_bus,
 //	.enable		= sis966_enable,
 	.ops_pci	= &lops_pci,
 };

src/southbridge/via/vt8237r/lpc.c

@@ -657,7 +657,7 @@ static const struct device_operations vt8237r_lpc_ops_s = {
 	.set_resources		= pci_dev_set_resources,
 	.enable_resources	= pci_dev_enable_resources,
 	.init			= vt8237s_init,
-	.scan_bus		= scan_static_bus,
+	.scan_bus		= scan_lpc_bus,
 	.ops_pci		= &lops_pci,
 };
 
@@ -666,7 +666,7 @@ static const struct device_operations vt8237r_lpc_ops_r = {
 	.set_resources		= pci_dev_set_resources,
 	.enable_resources	= pci_dev_enable_resources,
 	.init			= vt8237r_init,
-	.scan_bus		= scan_static_bus,
+	.scan_bus		= scan_lpc_bus,
 	.ops_pci		= &lops_pci,
 };
 
@@ -675,7 +675,7 @@ static const struct device_operations vt8237r_lpc_ops_a = {
 	.set_resources		= pci_dev_set_resources,
 	.enable_resources	= pci_dev_enable_resources,
 	.init			= vt8237a_init,
-	.scan_bus		= scan_static_bus,
+	.scan_bus		= scan_lpc_bus,
 	.ops_pci		= &lops_pci,
 };
 

src/superio/smsc/lpc47b397/superio.c

@@ -134,7 +134,6 @@ static struct device_operations ops_hwm = {
 	.enable_resources = lpc47b397_pnp_enable_resources,
 	.enable           = pnp_alt_enable,
 	.init             = lpc47b397_init,
-	.scan_bus         = scan_static_bus,
 	.ops_smbus_bus    = &lops_smbus_bus,
 	.ops_pnp_mode     = &pnp_conf_mode_55_aa,
 };