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mb/intel/adlrvp: Enable CSE Lite SKU 

During the initial phases, the development and validation teams have to
deal with both Consumer SKU and Lite SKU firmware. Having the support for
CSE Lite enabled by default in coreboot helps in integrating both the SKUs.
With this we only have to interchange the CSE region in the full BIOS image
without having to worry about Kconfigs. Eases the build and integration
flow.

TEST= Built and booted on ADL-P LP4 RVP

Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Change-Id: Ia92c7b71c69a23104ace9fc53fd39f01120fa751
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51567
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Sridhar Siricilla 2021-03-17 15:13:08 +05:30 committed by Patrick Georgi
parent 5052e1f45c
commit d1150fd6d7
1 changed files with 1 additions and 0 deletions
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src/mainboard/intel/adlrvp/Kconfig
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@ -17,6 +17,7 @@ config BOARD_SPECIFIC_OPTIONS
select SOC_INTEL_ALDERLAKE_PCH_M if BOARD_INTEL_ADLRVP_M || BOARD_INTEL_ADLRVP_M_EXT_EC select SOC_INTEL_ALDERLAKE_PCH_M if BOARD_INTEL_ADLRVP_M || BOARD_INTEL_ADLRVP_M_EXT_EC
select HAVE_SPD_IN_CBFS select HAVE_SPD_IN_CBFS
select DRIVERS_SOUNDWIRE_ALC711 select DRIVERS_SOUNDWIRE_ALC711
select SOC_INTEL_CSE_LITE_SKU
config CHROMEOS config CHROMEOS
select GBB_FLAG_FORCE_DEV_SWITCH_ON select GBB_FLAG_FORCE_DEV_SWITCH_ON