Rename AMD_AGESA to CPU_AMD_AGESA
Also any CPU_AMD_AGESA_FAMILYxx selects CPU_AMD_AGESA, so remove the explicit selects from the mainboards. Change-Id: I4d71726bccd446b0f4db4e26448b5c91e406a641 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/792 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
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@ -51,5 +51,5 @@ SECTIONS
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*(.eh_frame);
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}
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_bogus = ASSERT((SIZEOF(.bss) + SIZEOF(.data)) == 0 || CONFIG_AMD_AGESA, "Do not use global variables in romstage");
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_bogus = ASSERT((SIZEOF(.bss) + SIZEOF(.data)) == 0 || CONFIG_CPU_AMD_AGESA, "Do not use global variables in romstage");
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}
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@ -14,4 +14,4 @@ subdirs-$(CONFIG_CPU_AMD_GEODE_LX) += geode_lx
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subdirs-$(CONFIG_CPU_AMD_SC520) += sc520
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subdirs-$(CONFIG_CPU_AMD_SOCKET_S1G1) += socket_S1G1
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subdirs-$(CONFIG_AMD_AGESA) += agesa
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subdirs-$(CONFIG_CPU_AMD_AGESA) += agesa
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@ -17,12 +17,15 @@
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# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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#
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config AMD_AGESA
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config CPU_AMD_AGESA
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bool
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default y if CPU_AMD_AGESA_FAMILY10
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default y if CPU_AMD_AGESA_FAMILY12
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default y if CPU_AMD_AGESA_FAMILY14
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default y if CPU_AMD_AGESA_FAMILY15
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default n
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if AMD_AGESA
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if CPU_AMD_AGESA
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config XIP_ROM_SIZE
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hex
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@ -40,5 +43,5 @@ source src/cpu/amd/agesa/family12/Kconfig
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source src/cpu/amd/agesa/family14/Kconfig
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source src/cpu/amd/agesa/family15/Kconfig
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endif # AMD_AGESA
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endif # CPU_AMD_AGESA
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@ -3,7 +3,7 @@
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ramstage-y += reset.c
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#SB800 CIMx share AGESA V5 lib code
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ifneq ($(CONFIG_AMD_AGESA),y)
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ifneq ($(CONFIG_CPU_AMD_AGESA),y)
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AGESA_ROOT ?= src/vendorcode/amd/agesa/f14
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romstage-y += ../../../../$(AGESA_ROOT)/Lib/amdlib.c
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ramstage-y += ../../../../$(AGESA_ROOT)/Lib/amdlib.c
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@ -43,10 +43,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
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select ENABLE_APIC_EXT_ID
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select GFXUMA
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config AMD_AGESA
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bool
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default y
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config MAINBOARD_DIR
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string
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default amd/inagua
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@ -42,10 +42,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
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select BOARD_ROMSIZE_KB_4096
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select GFXUMA
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config AMD_AGESA
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bool
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default y
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config MAINBOARD_DIR
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string
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default amd/persimmon
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@ -43,10 +43,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
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select GFXUMA
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select UDELAY_LAPIC
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config AMD_AGESA
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bool
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default y
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config MAINBOARD_DIR
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string
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default amd/south_station
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@ -45,10 +45,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
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select ENABLE_APIC_EXT_ID
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select GFXUMA
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config AMD_AGESA
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bool
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default y
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config MAINBOARD_DIR
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string
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default amd/torpedo
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@ -42,10 +42,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
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select GFXUMA
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select UDELAY_LAPIC
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config AMD_AGESA
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bool
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default y
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config MAINBOARD_DIR
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string
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default amd/union_station
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@ -43,10 +43,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
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select BOARD_ROMSIZE_KB_4096
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select GFXUMA
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config AMD_AGESA
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bool
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default y
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config MAINBOARD_DIR
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string
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default asrock/e350m1
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@ -1,7 +1,7 @@
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ramstage-y += reset.c
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#SB800 CIMx share AGESA V5 lib code
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ifneq ($(CONFIG_AMD_AGESA),y)
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ifneq ($(CONFIG_CPU_AMD_AGESA),y)
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AGESA_ROOT ?= src/vendorcode/amd/agesa/f14
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romstage-y += ../../../../$(AGESA_ROOT)/Lib/amdlib.c
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ramstage-y += ../../../../$(AGESA_ROOT)/Lib/amdlib.c
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@ -3,7 +3,7 @@
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ramstage-y += reset.c
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#SB800 CIMx share AGESA V5 lib code
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ifneq ($(CONFIG_AMD_AGESA),y)
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ifneq ($(CONFIG_CPU_AMD_AGESA),y)
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AGESA_ROOT ?= src/vendorcode/amd/agesa/f14
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romstage-y += ../../../../$(AGESA_ROOT)/Lib/amdlib.c
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ramstage-y += ../../../../$(AGESA_ROOT)/Lib/amdlib.c
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@ -19,7 +19,7 @@
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config NORTHBRIDGE_AMD_AGESA
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bool
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default AMD_AGESA
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default CPU_AMD_AGESA
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if NORTHBRIDGE_AMD_AGESA
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