From d123f8d8716811149ecdf7d51661d8cee6f48577 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Fri, 15 Dec 2023 10:57:30 +0100 Subject: [PATCH] soc/amd/genoa: rename to genoa_poc Even though this SoC is called 'Genoa', the openSIL implementation and the corresponding coreboot integration is only a proof of concept that isn't fully featured, has known limitations and bugs, and is not meant for or ready to being productized. Adding the proof of concept suffix to the name should point this out clearly enough so that no potential customer could infer that this might be a fully functional and supported implementation which it is not. Change-Id: Ia459b1e007dcfd8e8710c12e252b2f9a4ae19b72 Signed-off-by: Varshit Pandya Signed-off-by: Felix Held Reviewed-on: https://review.coreboot.org/c/coreboot/+/77894 Reviewed-by: Martin Roth Reviewed-by: Marshall Dawson Tested-by: build bot (Jenkins) --- src/mainboard/amd/onyx/Kconfig | 2 +- src/mainboard/amd/onyx/devicetree.cb | 2 +- src/soc/amd/genoa/include/soc/soc_chip.h | 8 -------- src/soc/amd/{genoa => genoa_poc}/Kconfig | 10 +++++----- src/soc/amd/{genoa => genoa_poc}/Makefile.inc | 6 +++--- src/soc/amd/{genoa => genoa_poc}/acpi.c | 0 src/soc/amd/{genoa => genoa_poc}/acpi/globalnvs.asl | 2 +- src/soc/amd/{genoa => genoa_poc}/acpi/mmio.asl | 0 src/soc/amd/{genoa => genoa_poc}/acpi/pci_int_defs.asl | 0 src/soc/amd/{genoa => genoa_poc}/acpi/soc.asl | 0 src/soc/amd/{genoa => genoa_poc}/aoac.c | 0 src/soc/amd/{genoa => genoa_poc}/chip.c | 4 ++-- src/soc/amd/{genoa => genoa_poc}/chip.h | 8 ++++---- src/soc/amd/{genoa => genoa_poc}/chipset.cb | 2 +- src/soc/amd/{genoa => genoa_poc}/config.c | 2 +- src/soc/amd/{genoa => genoa_poc}/cpu.c | 0 src/soc/amd/{genoa => genoa_poc}/domain.c | 0 src/soc/amd/{genoa => genoa_poc}/early_fch.c | 0 src/soc/amd/{genoa => genoa_poc}/fch.c | 0 src/soc/amd/{genoa => genoa_poc}/fw.cfg | 0 src/soc/amd/{genoa => genoa_poc}/gpio.c | 0 src/soc/amd/{genoa => genoa_poc}/i2c.c | 4 ++-- src/soc/amd/{genoa => genoa_poc}/include/soc/acpi.h | 6 +++--- .../include/soc/amd_pci_int_defs.h | 6 +++--- .../amd/{genoa => genoa_poc}/include/soc/aoac_defs.h | 6 +++--- src/soc/amd/{genoa => genoa_poc}/include/soc/cpu.h | 6 +++--- .../amd/{genoa => genoa_poc}/include/soc/data_fabric.h | 6 +++--- src/soc/amd/{genoa => genoa_poc}/include/soc/gpio.h | 6 +++--- src/soc/amd/{genoa => genoa_poc}/include/soc/i2c.h | 6 +++--- src/soc/amd/{genoa => genoa_poc}/include/soc/iomap.h | 6 +++--- src/soc/amd/{genoa => genoa_poc}/include/soc/lpc.h | 6 +++--- src/soc/amd/{genoa => genoa_poc}/include/soc/msr.h | 6 +++--- src/soc/amd/{genoa => genoa_poc}/include/soc/nvs.h | 8 ++++---- .../amd/{genoa => genoa_poc}/include/soc/pci_devs.h | 6 +++--- src/soc/amd/{genoa => genoa_poc}/include/soc/smi.h | 6 +++--- src/soc/amd/{genoa => genoa_poc}/include/soc/smu.h | 6 +++--- src/soc/amd/genoa_poc/include/soc/soc_chip.h | 8 ++++++++ .../amd/{genoa => genoa_poc}/include/soc/southbridge.h | 6 +++--- src/soc/amd/{genoa => genoa_poc}/include/soc/uart.h | 6 +++--- src/soc/amd/{genoa => genoa_poc}/mca.c | 0 src/soc/amd/{genoa => genoa_poc}/mmap_boot.c | 0 src/soc/amd/{genoa => genoa_poc}/reset.c | 0 src/soc/amd/{genoa => genoa_poc}/romstage.c | 0 src/soc/amd/{genoa => genoa_poc}/root_complex.c | 0 src/soc/amd/{genoa => genoa_poc}/smihandler.c | 0 src/soc/amd/{genoa => genoa_poc}/uart.c | 0 src/vendorcode/amd/opensil/genoa_poc/ramstage.c | 2 +- 47 files changed, 79 insertions(+), 79 deletions(-) delete mode 100644 src/soc/amd/genoa/include/soc/soc_chip.h rename src/soc/amd/{genoa => genoa_poc}/Kconfig (97%) rename src/soc/amd/{genoa => genoa_poc}/Makefile.inc (97%) rename src/soc/amd/{genoa => genoa_poc}/acpi.c (100%) rename src/soc/amd/{genoa => genoa_poc}/acpi/globalnvs.asl (87%) rename src/soc/amd/{genoa => genoa_poc}/acpi/mmio.asl (100%) rename src/soc/amd/{genoa => genoa_poc}/acpi/pci_int_defs.asl (100%) rename src/soc/amd/{genoa => genoa_poc}/acpi/soc.asl (100%) rename src/soc/amd/{genoa => genoa_poc}/aoac.c (100%) rename src/soc/amd/{genoa => genoa_poc}/chip.c (77%) rename src/soc/amd/{genoa => genoa_poc}/chip.h (92%) rename src/soc/amd/{genoa => genoa_poc}/chipset.cb (99%) rename src/soc/amd/{genoa => genoa_poc}/config.c (79%) rename src/soc/amd/{genoa => genoa_poc}/cpu.c (100%) rename src/soc/amd/{genoa => genoa_poc}/domain.c (100%) rename src/soc/amd/{genoa => genoa_poc}/early_fch.c (100%) rename src/soc/amd/{genoa => genoa_poc}/fch.c (100%) rename src/soc/amd/{genoa => genoa_poc}/fw.cfg (100%) rename src/soc/amd/{genoa => genoa_poc}/gpio.c (100%) rename src/soc/amd/{genoa => genoa_poc}/i2c.c (92%) rename src/soc/amd/{genoa => genoa_poc}/include/soc/acpi.h (72%) rename src/soc/amd/{genoa => genoa_poc}/include/soc/amd_pci_int_defs.h (93%) rename src/soc/amd/{genoa => genoa_poc}/include/soc/aoac_defs.h (81%) rename src/soc/amd/{genoa => genoa_poc}/include/soc/cpu.h (63%) rename src/soc/amd/{genoa => genoa_poc}/include/soc/data_fabric.h (96%) rename src/soc/amd/{genoa => genoa_poc}/include/soc/gpio.h (98%) rename src/soc/amd/{genoa => genoa_poc}/include/soc/i2c.h (91%) rename src/soc/amd/{genoa => genoa_poc}/include/soc/iomap.h (90%) rename src/soc/amd/{genoa => genoa_poc}/include/soc/lpc.h (82%) rename src/soc/amd/{genoa => genoa_poc}/include/soc/msr.h (93%) rename src/soc/amd/{genoa => genoa_poc}/include/soc/nvs.h (72%) rename src/soc/amd/{genoa => genoa_poc}/include/soc/pci_devs.h (91%) rename src/soc/amd/{genoa => genoa_poc}/include/soc/smi.h (98%) rename src/soc/amd/{genoa => genoa_poc}/include/soc/smu.h (84%) create mode 100644 src/soc/amd/genoa_poc/include/soc/soc_chip.h rename src/soc/amd/{genoa => genoa_poc}/include/soc/southbridge.h (97%) rename src/soc/amd/{genoa => genoa_poc}/include/soc/uart.h (61%) rename src/soc/amd/{genoa => genoa_poc}/mca.c (100%) rename src/soc/amd/{genoa => genoa_poc}/mmap_boot.c (100%) rename src/soc/amd/{genoa => genoa_poc}/reset.c (100%) rename src/soc/amd/{genoa => genoa_poc}/romstage.c (100%) rename src/soc/amd/{genoa => genoa_poc}/root_complex.c (100%) rename src/soc/amd/{genoa => genoa_poc}/smihandler.c (100%) rename src/soc/amd/{genoa => genoa_poc}/uart.c (100%) diff --git a/src/mainboard/amd/onyx/Kconfig b/src/mainboard/amd/onyx/Kconfig index e724d14ab0..7224a9b662 100644 --- a/src/mainboard/amd/onyx/Kconfig +++ b/src/mainboard/amd/onyx/Kconfig @@ -2,7 +2,7 @@ if BOARD_AMD_ONYX config BOARD_SPECIFIC_OPTIONS def_bool y - select SOC_AMD_GENOA + select SOC_AMD_GENOA_POC select BOARD_ROMSIZE_KB_32768 select AMD_SOC_CONSOLE_UART diff --git a/src/mainboard/amd/onyx/devicetree.cb b/src/mainboard/amd/onyx/devicetree.cb index d53da0ed1f..a18eff40da 100644 --- a/src/mainboard/amd/onyx/devicetree.cb +++ b/src/mainboard/amd/onyx/devicetree.cb @@ -1,4 +1,4 @@ -chip soc/amd/genoa +chip soc/amd/genoa_poc # USB configuration register "usb.xhci0_enable" = "1" diff --git a/src/soc/amd/genoa/include/soc/soc_chip.h b/src/soc/amd/genoa/include/soc/soc_chip.h deleted file mode 100644 index d5dae9add8..0000000000 --- a/src/soc/amd/genoa/include/soc/soc_chip.h +++ /dev/null @@ -1,8 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#ifndef _SOC_GENOA_SOC_CHIP_H_ -#define _SOC_GENOA_SOC_CHIP_H_ - -#include "../../chip.h" - -#endif diff --git a/src/soc/amd/genoa/Kconfig b/src/soc/amd/genoa_poc/Kconfig similarity index 97% rename from src/soc/amd/genoa/Kconfig rename to src/soc/amd/genoa_poc/Kconfig index 592043eb8a..782e4aa726 100644 --- a/src/soc/amd/genoa/Kconfig +++ b/src/soc/amd/genoa_poc/Kconfig @@ -1,7 +1,7 @@ -config SOC_AMD_GENOA +config SOC_AMD_GENOA_POC bool -if SOC_AMD_GENOA +if SOC_AMD_GENOA_POC config SOC_SPECIFIC_OPTIONS def_bool y @@ -51,7 +51,7 @@ config USE_EXP_X86_64_SUPPORT config CHIPSET_DEVICETREE string - default "soc/amd/genoa/chipset.cb" + default "soc/amd/genoa_poc/chipset.cb" config DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ int @@ -124,7 +124,7 @@ menu "PSP Configuration Options" config AMDFW_CONFIG_FILE string - default "src/soc/amd/genoa/fw.cfg" + default "src/soc/amd/genoa_poc/fw.cfg" config PSP_DISABLE_POSTCODES bool "Disable PSP post codes" @@ -209,4 +209,4 @@ config ACPI_BERT_SIZE Specify the amount of DRAM reserved for gathering the data used to generate the ACPI table. -endif # SOC_AMD_GENOA +endif # SOC_AMD_GENOA_POC diff --git a/src/soc/amd/genoa/Makefile.inc b/src/soc/amd/genoa_poc/Makefile.inc similarity index 97% rename from src/soc/amd/genoa/Makefile.inc rename to src/soc/amd/genoa_poc/Makefile.inc index 30efcaf4a8..7d54254436 100644 --- a/src/soc/amd/genoa/Makefile.inc +++ b/src/soc/amd/genoa_poc/Makefile.inc @@ -1,5 +1,5 @@ ## SPDX-License-Identifier: GPL-2.0-only -ifeq ($(CONFIG_SOC_AMD_GENOA),y) +ifeq ($(CONFIG_SOC_AMD_GENOA_POC),y) all-y += mmap_boot.c all-y += reset.c @@ -25,8 +25,8 @@ ramstage-y += mca.c smm-y += smihandler.c -CPPFLAGS_common += -I$(src)/soc/amd/genoa/acpi -CPPFLAGS_common += -I$(src)/soc/amd/genoa/include +CPPFLAGS_common += -I$(src)/soc/amd/genoa_poc/acpi +CPPFLAGS_common += -I$(src)/soc/amd/genoa_poc/include ifeq ($(call int-gt, $(CONFIG_ROM_SIZE) 0x1000000), 1) CBFSTOOL_ADD_CMD_OPTIONS+= --mmap 0:0xff000000:0x1000000 diff --git a/src/soc/amd/genoa/acpi.c b/src/soc/amd/genoa_poc/acpi.c similarity index 100% rename from src/soc/amd/genoa/acpi.c rename to src/soc/amd/genoa_poc/acpi.c diff --git a/src/soc/amd/genoa/acpi/globalnvs.asl b/src/soc/amd/genoa_poc/acpi/globalnvs.asl similarity index 87% rename from src/soc/amd/genoa/acpi/globalnvs.asl rename to src/soc/amd/genoa_poc/acpi/globalnvs.asl index 23c53ee854..7e7d50dc6a 100644 --- a/src/soc/amd/genoa/acpi/globalnvs.asl +++ b/src/soc/amd/genoa_poc/acpi/globalnvs.asl @@ -2,7 +2,7 @@ /* * NOTE: The layout of the GNVS structure below must match the layout in - * soc/amd/genoa/include/soc/nvs.h !!! + * soc/amd/genoa_poc/include/soc/nvs.h !!! */ Field (GNVS, ByteAcc, NoLock, Preserve) diff --git a/src/soc/amd/genoa/acpi/mmio.asl b/src/soc/amd/genoa_poc/acpi/mmio.asl similarity index 100% rename from src/soc/amd/genoa/acpi/mmio.asl rename to src/soc/amd/genoa_poc/acpi/mmio.asl diff --git a/src/soc/amd/genoa/acpi/pci_int_defs.asl b/src/soc/amd/genoa_poc/acpi/pci_int_defs.asl similarity index 100% rename from src/soc/amd/genoa/acpi/pci_int_defs.asl rename to src/soc/amd/genoa_poc/acpi/pci_int_defs.asl diff --git a/src/soc/amd/genoa/acpi/soc.asl b/src/soc/amd/genoa_poc/acpi/soc.asl similarity index 100% rename from src/soc/amd/genoa/acpi/soc.asl rename to src/soc/amd/genoa_poc/acpi/soc.asl diff --git a/src/soc/amd/genoa/aoac.c b/src/soc/amd/genoa_poc/aoac.c similarity index 100% rename from src/soc/amd/genoa/aoac.c rename to src/soc/amd/genoa_poc/aoac.c diff --git a/src/soc/amd/genoa/chip.c b/src/soc/amd/genoa_poc/chip.c similarity index 77% rename from src/soc/amd/genoa/chip.c rename to src/soc/amd/genoa_poc/chip.c index d32d3aef7a..eb35a25bf8 100644 --- a/src/soc/amd/genoa/chip.c +++ b/src/soc/amd/genoa_poc/chip.c @@ -13,8 +13,8 @@ static void soc_final(void *chip_info) { } -struct chip_operations soc_amd_genoa_ops = { - CHIP_NAME("AMD Genoa SoC") +struct chip_operations soc_amd_genoa_poc_ops = { + CHIP_NAME("AMD Genoa SoC Proof of Concept") .init = soc_init, .final = soc_final, }; diff --git a/src/soc/amd/genoa/chip.h b/src/soc/amd/genoa_poc/chip.h similarity index 92% rename from src/soc/amd/genoa/chip.h rename to src/soc/amd/genoa_poc/chip.h index 5577c12d85..39a5743ea8 100644 --- a/src/soc/amd/genoa/chip.h +++ b/src/soc/amd/genoa_poc/chip.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#ifndef __GENOA_CHIP_H__ -#define __GENOA_CHIP_H__ +#ifndef __GENOA_POC_CHIP_H__ +#define __GENOA_POC_CHIP_H__ #include #include @@ -60,7 +60,7 @@ struct soc_usb_config { }; -struct soc_amd_genoa_config { +struct soc_amd_genoa_poc_config { struct soc_amd_common_config common_config; u8 i2c_scl_reset; @@ -69,4 +69,4 @@ struct soc_amd_genoa_config { struct soc_usb_config usb; }; -#endif +#endif /* __GENOA_POC_CHIP_H__ */ diff --git a/src/soc/amd/genoa/chipset.cb b/src/soc/amd/genoa_poc/chipset.cb similarity index 99% rename from src/soc/amd/genoa/chipset.cb rename to src/soc/amd/genoa_poc/chipset.cb index df40b650fb..dccffde822 100644 --- a/src/soc/amd/genoa/chipset.cb +++ b/src/soc/amd/genoa_poc/chipset.cb @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0-only -chip soc/amd/genoa +chip soc/amd/genoa_poc device cpu_cluster 0 on ops amd_cpu_bus_ops end # OC pins diff --git a/src/soc/amd/genoa/config.c b/src/soc/amd/genoa_poc/config.c similarity index 79% rename from src/soc/amd/genoa/config.c rename to src/soc/amd/genoa_poc/config.c index f59964a260..895ba05e92 100644 --- a/src/soc/amd/genoa/config.c +++ b/src/soc/amd/genoa_poc/config.c @@ -7,6 +7,6 @@ const struct soc_amd_common_config *soc_get_common_config(void) { - const struct soc_amd_genoa_config *cfg = config_of_soc(); + const struct soc_amd_genoa_poc_config *cfg = config_of_soc(); return &cfg->common_config; } diff --git a/src/soc/amd/genoa/cpu.c b/src/soc/amd/genoa_poc/cpu.c similarity index 100% rename from src/soc/amd/genoa/cpu.c rename to src/soc/amd/genoa_poc/cpu.c diff --git a/src/soc/amd/genoa/domain.c b/src/soc/amd/genoa_poc/domain.c similarity index 100% rename from src/soc/amd/genoa/domain.c rename to src/soc/amd/genoa_poc/domain.c diff --git a/src/soc/amd/genoa/early_fch.c b/src/soc/amd/genoa_poc/early_fch.c similarity index 100% rename from src/soc/amd/genoa/early_fch.c rename to src/soc/amd/genoa_poc/early_fch.c diff --git a/src/soc/amd/genoa/fch.c b/src/soc/amd/genoa_poc/fch.c similarity index 100% rename from src/soc/amd/genoa/fch.c rename to src/soc/amd/genoa_poc/fch.c diff --git a/src/soc/amd/genoa/fw.cfg b/src/soc/amd/genoa_poc/fw.cfg similarity index 100% rename from src/soc/amd/genoa/fw.cfg rename to src/soc/amd/genoa_poc/fw.cfg diff --git a/src/soc/amd/genoa/gpio.c b/src/soc/amd/genoa_poc/gpio.c similarity index 100% rename from src/soc/amd/genoa/gpio.c rename to src/soc/amd/genoa_poc/gpio.c diff --git a/src/soc/amd/genoa/i2c.c b/src/soc/amd/genoa_poc/i2c.c similarity index 92% rename from src/soc/amd/genoa/i2c.c rename to src/soc/amd/genoa_poc/i2c.c index 76c10498e8..7261a8792a 100644 --- a/src/soc/amd/genoa/i2c.c +++ b/src/soc/amd/genoa_poc/i2c.c @@ -27,7 +27,7 @@ static const struct soc_i2c_ctrlr_info i2c_ctrlr[I2C_CTRLR_COUNT] = { void reset_i2c_peripherals(void) { - const struct soc_amd_genoa_config *cfg = config_of_soc(); + const struct soc_amd_genoa_poc_config *cfg = config_of_soc(); struct soc_i2c_peripheral_reset_info reset_info; reset_info.i2c_scl_reset_mask = cfg->i2c_scl_reset & GPIO_I2C_MASK; @@ -49,7 +49,7 @@ const struct soc_i2c_ctrlr_info *soc_get_i2c_ctrlr_info(size_t *num_ctrlrs) const struct dw_i2c_bus_config *soc_get_i2c_bus_config(size_t *num_buses) { - const struct soc_amd_genoa_config *config = config_of_soc(); + const struct soc_amd_genoa_poc_config *config = config_of_soc(); *num_buses = ARRAY_SIZE(config->i2c); return config->i2c; diff --git a/src/soc/amd/genoa/include/soc/acpi.h b/src/soc/amd/genoa_poc/include/soc/acpi.h similarity index 72% rename from src/soc/amd/genoa/include/soc/acpi.h rename to src/soc/amd/genoa_poc/include/soc/acpi.h index 5c0efa5868..082386fe61 100644 --- a/src/soc/amd/genoa/include/soc/acpi.h +++ b/src/soc/amd/genoa_poc/include/soc/acpi.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ -#ifndef AMD_GENOA_ACPI_H -#define AMD_GENOA_ACPI_H +#ifndef AMD_GENOA_POC_ACPI_H +#define AMD_GENOA_POC_ACPI_H #include #include @@ -11,4 +11,4 @@ unsigned long soc_acpi_write_tables(const struct device *device, unsigned long current, struct acpi_rsdp *rsdp); -#endif /* AMD_GENOA_ACPI_H */ +#endif /* AMD_GENOA_POC_ACPI_H */ diff --git a/src/soc/amd/genoa/include/soc/amd_pci_int_defs.h b/src/soc/amd/genoa_poc/include/soc/amd_pci_int_defs.h similarity index 93% rename from src/soc/amd/genoa/include/soc/amd_pci_int_defs.h rename to src/soc/amd/genoa_poc/include/soc/amd_pci_int_defs.h index b99ee413b3..1e51bb8727 100644 --- a/src/soc/amd/genoa/include/soc/amd_pci_int_defs.h +++ b/src/soc/amd/genoa_poc/include/soc/amd_pci_int_defs.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#ifndef AMD_GENOA_AMD_PCI_INT_DEFS_H -#define AMD_GENOA_AMD_PCI_INT_DEFS_H +#ifndef AMD_GENOA_POC_AMD_PCI_INT_DEFS_H +#define AMD_GENOA_POC_AMD_PCI_INT_DEFS_H /* * * PIRQ and device routing - these define the index into the @@ -53,4 +53,4 @@ #define PIRQ_UART2 0x78 /* UART2 */ #define PIRQ_UART3 0x79 /* UART3 */ -#endif /* AMD_GENOA_AMD_PCI_INT_DEFS_H */ +#endif /* AMD_GENOA_POC_AMD_PCI_INT_DEFS_H */ diff --git a/src/soc/amd/genoa/include/soc/aoac_defs.h b/src/soc/amd/genoa_poc/include/soc/aoac_defs.h similarity index 81% rename from src/soc/amd/genoa/include/soc/aoac_defs.h rename to src/soc/amd/genoa_poc/include/soc/aoac_defs.h index 90f4de8a3b..c5c11bb3bf 100644 --- a/src/soc/amd/genoa/include/soc/aoac_defs.h +++ b/src/soc/amd/genoa_poc/include/soc/aoac_defs.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#ifndef AMD_GENOA_AOAC_DEFS_H -#define AMD_GENOA_AOAC_DEFS_H +#ifndef AMD_GENOA_POC_AOAC_DEFS_H +#define AMD_GENOA_POC_AOAC_DEFS_H /* FCH AOAC device offsets for AOAC_DEV_D3_CTL/AOAC_DEV_D3_STATE */ #define FCH_AOAC_DEV_CLK_GEN 0 @@ -17,4 +17,4 @@ #define FCH_AOAC_DEV_AMBA 17 #define FCH_AOAC_DEV_ESPI 27 -#endif /* AMD_GENOA_AOAC_DEFS_H */ +#endif /* AMD_GENOA_POC_AOAC_DEFS_H */ diff --git a/src/soc/amd/genoa/include/soc/cpu.h b/src/soc/amd/genoa_poc/include/soc/cpu.h similarity index 63% rename from src/soc/amd/genoa/include/soc/cpu.h rename to src/soc/amd/genoa_poc/include/soc/cpu.h index 836c9877ba..d8a9ddb2f4 100644 --- a/src/soc/amd/genoa/include/soc/cpu.h +++ b/src/soc/amd/genoa_poc/include/soc/cpu.h @@ -1,9 +1,9 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#ifndef AMD_GENOA_CPU_H -#define AMD_GENOA_CPU_H +#ifndef AMD_GENOA_POC_CPU_H +#define AMD_GENOA_POC_CPU_H #define GENOA_A0_CPUID CPUID_FROM_FMS(0x19, 0x10, 0) #define GENOA_B0_CPUID CPUID_FROM_FMS(0x19, 0x11, 0) -#endif /* AMD_GENOA_CPU_H */ +#endif /* AMD_GENOA_POC_CPU_H */ diff --git a/src/soc/amd/genoa/include/soc/data_fabric.h b/src/soc/amd/genoa_poc/include/soc/data_fabric.h similarity index 96% rename from src/soc/amd/genoa/include/soc/data_fabric.h rename to src/soc/amd/genoa_poc/include/soc/data_fabric.h index 02c639ab16..9c990ccf6f 100644 --- a/src/soc/amd/genoa/include/soc/data_fabric.h +++ b/src/soc/amd/genoa_poc/include/soc/data_fabric.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#ifndef AMD_GENOA_DATA_FABRIC_H -#define AMD_GENOA_DATA_FABRIC_H +#ifndef AMD_GENOA_POC_DATA_FABRIC_H +#define AMD_GENOA_POC_DATA_FABRIC_H #include #include @@ -135,4 +135,4 @@ union df_ficaa { uint32_t raw; }; -#endif /* AMD_GENOA_DATA_FABRIC_H */ +#endif /* AMD_GENOA_POC_DATA_FABRIC_H */ diff --git a/src/soc/amd/genoa/include/soc/gpio.h b/src/soc/amd/genoa_poc/include/soc/gpio.h similarity index 98% rename from src/soc/amd/genoa/include/soc/gpio.h rename to src/soc/amd/genoa_poc/include/soc/gpio.h index 72d77c69f9..f8189642fc 100644 --- a/src/soc/amd/genoa/include/soc/gpio.h +++ b/src/soc/amd/genoa_poc/include/soc/gpio.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#ifndef AMD_GENOA_GPIO_H -#define AMD_GENOA_GPIO_H +#ifndef AMD_GENOA_POC_GPIO_H +#define AMD_GENOA_POC_GPIO_H #define GPIO_DEVICE_NAME "AMDI0030" #define GPIO_DEVICE_DESC "GPIO Controller" @@ -267,4 +267,4 @@ #define GPIO_266_IOMUX_PCIE_RST0_L 0 #define GPIO_266_IOMUX_GPIOxx 1 -#endif /* AMD_GENOA_GPIO_H */ +#endif /* AMD_GENOA_POC_GPIO_H */ diff --git a/src/soc/amd/genoa/include/soc/i2c.h b/src/soc/amd/genoa_poc/include/soc/i2c.h similarity index 91% rename from src/soc/amd/genoa/include/soc/i2c.h rename to src/soc/amd/genoa_poc/include/soc/i2c.h index ffff754f1b..dfecceb5e2 100644 --- a/src/soc/amd/genoa/include/soc/i2c.h +++ b/src/soc/amd/genoa_poc/include/soc/i2c.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#ifndef AMD_GENOA_I2C_H -#define AMD_GENOA_I2C_H +#ifndef AMD_GENOA_POC_I2C_H +#define AMD_GENOA_POC_I2C_H #include #include @@ -33,4 +33,4 @@ void reset_i2c_peripherals(void); -#endif /* AMD_GENOA_I2C_H */ +#endif /* AMD_GENOA_POC_I2C_H */ diff --git a/src/soc/amd/genoa/include/soc/iomap.h b/src/soc/amd/genoa_poc/include/soc/iomap.h similarity index 90% rename from src/soc/amd/genoa/include/soc/iomap.h rename to src/soc/amd/genoa_poc/include/soc/iomap.h index 0e24780a0f..f7a1bac235 100644 --- a/src/soc/amd/genoa/include/soc/iomap.h +++ b/src/soc/amd/genoa_poc/include/soc/iomap.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#ifndef AMD_GENOA_IOMAP_H -#define AMD_GENOA_IOMAP_H +#ifndef AMD_GENOA_POC_IOMAP_H +#define AMD_GENOA_POC_IOMAP_H #define I2C_MASTER_DEV_COUNT 6 #define I2C_PERIPHERAL_DEV_COUNT 0 @@ -34,4 +34,4 @@ #define APU_I3C2_BASE 0xfedd4000 #define APU_I3C3_BASE 0xfedd6000 -#endif /* AMD_GENOA_IOMAP_H */ +#endif /* AMD_GENOA_POC_IOMAP_H */ diff --git a/src/soc/amd/genoa/include/soc/lpc.h b/src/soc/amd/genoa_poc/include/soc/lpc.h similarity index 82% rename from src/soc/amd/genoa/include/soc/lpc.h rename to src/soc/amd/genoa_poc/include/soc/lpc.h index f98ffe8ef8..e5fe8321f5 100644 --- a/src/soc/amd/genoa/include/soc/lpc.h +++ b/src/soc/amd/genoa_poc/include/soc/lpc.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#ifndef AMD_GENOA_LPC_H -#define AMD_GENOA_LPC_H +#ifndef AMD_GENOA_POC_LPC_H +#define AMD_GENOA_POC_LPC_H #define SPI_BASE_ADDRESS_REGISTER 0xa0 #define SPI_BASE_ALIGNMENT BIT(8) @@ -13,4 +13,4 @@ #define SPI_ROM_ALT_ENABLE BIT(0) #define SPI_PRESERVE_BITS (BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4)) -#endif /* AMD_GENOA_LPC_H */ +#endif /* AMD_GENOA_POC_LPC_H */ diff --git a/src/soc/amd/genoa/include/soc/msr.h b/src/soc/amd/genoa_poc/include/soc/msr.h similarity index 93% rename from src/soc/amd/genoa/include/soc/msr.h rename to src/soc/amd/genoa_poc/include/soc/msr.h index 368c631d7d..31328ea994 100644 --- a/src/soc/amd/genoa/include/soc/msr.h +++ b/src/soc/amd/genoa_poc/include/soc/msr.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#ifndef AMD_GENOA_MSR_H -#define AMD_GENOA_MSR_H +#ifndef AMD_GENOA_POC_MSR_H +#define AMD_GENOA_POC_MSR_H /* MSRC001_00[6B:64] P-state [7:0] bit definitions */ union pstate_msr { @@ -38,4 +38,4 @@ union pstate_msr { #define MSR_MAX_PERFORMANCE_FREQUENCY_CLOCK_COUNT 0xe7 #define MSR_ACTUAL_PERFORMANCE_FREQUENCY_CLOCK_COUNT 0xe8 -#endif /* AMD_GENOA_MSR_H */ +#endif /* AMD_GENOA_POC_MSR_H */ diff --git a/src/soc/amd/genoa/include/soc/nvs.h b/src/soc/amd/genoa_poc/include/soc/nvs.h similarity index 72% rename from src/soc/amd/genoa/include/soc/nvs.h rename to src/soc/amd/genoa_poc/include/soc/nvs.h index cbc9ba9b4d..cfc1b565cb 100644 --- a/src/soc/amd/genoa/include/soc/nvs.h +++ b/src/soc/amd/genoa_poc/include/soc/nvs.h @@ -4,12 +4,12 @@ /* * NOTE: The layout of the global_nvs structure below must match the layout - * in soc/soc/amd/genoa/acpi/globalnvs.asl !!! + * in soc/soc/amd/genoa_poc/acpi/globalnvs.asl !!! * */ -#ifndef AMD_GENOA_NVS_H -#define AMD_GENOA_NVS_H +#ifndef AMD_GENOA_POC_NVS_H +#define AMD_GENOA_POC_NVS_H #include @@ -19,4 +19,4 @@ struct __packed global_nvs { uint64_t gpei; /* 0x08 - 0x0f - GPE Wake Source */ }; -#endif /* AMD_GENOA_NVS_H */ +#endif /* AMD_GENOA_POC_NVS_H */ diff --git a/src/soc/amd/genoa/include/soc/pci_devs.h b/src/soc/amd/genoa_poc/include/soc/pci_devs.h similarity index 91% rename from src/soc/amd/genoa/include/soc/pci_devs.h rename to src/soc/amd/genoa_poc/include/soc/pci_devs.h index d314deb4a5..6f0b15aa43 100644 --- a/src/soc/amd/genoa/include/soc/pci_devs.h +++ b/src/soc/amd/genoa_poc/include/soc/pci_devs.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#ifndef AMD_GENOA_PCI_DEVS_H -#define AMD_GENOA_PCI_DEVS_H +#ifndef AMD_GENOA_POC_PCI_DEVS_H +#define AMD_GENOA_POC_PCI_DEVS_H #include #include @@ -45,4 +45,4 @@ #define DF_F7_DEVFN PCI_DEVFN(DF_DEV, 7) #define SOC_DF_F7_DEV _SOC_DEV(DF_DEV, 7) -#endif +#endif /* AMD_GENOA_POC_PCI_DEVS_H */ diff --git a/src/soc/amd/genoa/include/soc/smi.h b/src/soc/amd/genoa_poc/include/soc/smi.h similarity index 98% rename from src/soc/amd/genoa/include/soc/smi.h rename to src/soc/amd/genoa_poc/include/soc/smi.h index c9054c53c1..b3a4de389b 100644 --- a/src/soc/amd/genoa/include/soc/smi.h +++ b/src/soc/amd/genoa_poc/include/soc/smi.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ -#ifndef AMD_GENOA_SMI_H -#define AMD_GENOA_SMI_H +#ifndef AMD_GENOA_POC_SMI_H +#define AMD_GENOA_POC_SMI_H #include @@ -179,4 +179,4 @@ #define SMI_MODE_MASK 0x03 -#endif /* AMD_GENOA_SMI_H */ +#endif /* AMD_GENOA_POC_SMI_H */ diff --git a/src/soc/amd/genoa/include/soc/smu.h b/src/soc/amd/genoa_poc/include/soc/smu.h similarity index 84% rename from src/soc/amd/genoa/include/soc/smu.h rename to src/soc/amd/genoa_poc/include/soc/smu.h index 6ab0c063e5..dd34044264 100644 --- a/src/soc/amd/genoa/include/soc/smu.h +++ b/src/soc/amd/genoa_poc/include/soc/smu.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#ifndef AMD_GENOA_SMU_H -#define AMD_GENOA_SMU_H +#ifndef AMD_GENOA_POC_SMU_H +#define AMD_GENOA_POC_SMU_H /* SMU mailbox register offsets in SMN */ #define SMN_SMU_MESG_ID 0x3b10530 @@ -20,4 +20,4 @@ enum smu_message_id { */ void smu_sx_entry(void); -#endif /* AMD_GENOA_SMU_H */ +#endif /* AMD_GENOA_POC_SMU_H */ diff --git a/src/soc/amd/genoa_poc/include/soc/soc_chip.h b/src/soc/amd/genoa_poc/include/soc/soc_chip.h new file mode 100644 index 0000000000..fa9cf5280c --- /dev/null +++ b/src/soc/amd/genoa_poc/include/soc/soc_chip.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef _SOC_GENOA_POC_SOC_CHIP_H_ +#define _SOC_GENOA_POC_SOC_CHIP_H_ + +#include "../../chip.h" + +#endif /* _SOC_GENOA_POC_SOC_CHIP_H_ */ diff --git a/src/soc/amd/genoa/include/soc/southbridge.h b/src/soc/amd/genoa_poc/include/soc/southbridge.h similarity index 97% rename from src/soc/amd/genoa/include/soc/southbridge.h rename to src/soc/amd/genoa_poc/include/soc/southbridge.h index 148ebfcbf4..a761d533c3 100644 --- a/src/soc/amd/genoa/include/soc/southbridge.h +++ b/src/soc/amd/genoa_poc/include/soc/southbridge.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#ifndef AMD_GENOA_SOUTHBRIDGE_H -#define AMD_GENOA_SOUTHBRIDGE_H +#ifndef AMD_GENOA_POC_SOUTHBRIDGE_H +#define AMD_GENOA_POC_SOUTHBRIDGE_H #include @@ -118,4 +118,4 @@ void fch_pre_init(void); void fch_early_init(void); -#endif /* AMD_GENOA_SOUTHBRIDGE_H */ +#endif /* AMD_GENOA_POC_SOUTHBRIDGE_H */ diff --git a/src/soc/amd/genoa/include/soc/uart.h b/src/soc/amd/genoa_poc/include/soc/uart.h similarity index 61% rename from src/soc/amd/genoa/include/soc/uart.h rename to src/soc/amd/genoa_poc/include/soc/uart.h index ae8f118461..922b5e9648 100644 --- a/src/soc/amd/genoa/include/soc/uart.h +++ b/src/soc/amd/genoa_poc/include/soc/uart.h @@ -1,10 +1,10 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#ifndef AMD_GENOA_UART_H -#define AMD_GENOA_UART_H +#ifndef AMD_GENOA_POC_UART_H +#define AMD_GENOA_POC_UART_H #include void clear_uart_legacy_config(void); /* disable legacy I/O decode for FCH UART */ -#endif /* AMD_GENOA_UART_H */ +#endif /* AMD_GENOA_POC_UART_H */ diff --git a/src/soc/amd/genoa/mca.c b/src/soc/amd/genoa_poc/mca.c similarity index 100% rename from src/soc/amd/genoa/mca.c rename to src/soc/amd/genoa_poc/mca.c diff --git a/src/soc/amd/genoa/mmap_boot.c b/src/soc/amd/genoa_poc/mmap_boot.c similarity index 100% rename from src/soc/amd/genoa/mmap_boot.c rename to src/soc/amd/genoa_poc/mmap_boot.c diff --git a/src/soc/amd/genoa/reset.c b/src/soc/amd/genoa_poc/reset.c similarity index 100% rename from src/soc/amd/genoa/reset.c rename to src/soc/amd/genoa_poc/reset.c diff --git a/src/soc/amd/genoa/romstage.c b/src/soc/amd/genoa_poc/romstage.c similarity index 100% rename from src/soc/amd/genoa/romstage.c rename to src/soc/amd/genoa_poc/romstage.c diff --git a/src/soc/amd/genoa/root_complex.c b/src/soc/amd/genoa_poc/root_complex.c similarity index 100% rename from src/soc/amd/genoa/root_complex.c rename to src/soc/amd/genoa_poc/root_complex.c diff --git a/src/soc/amd/genoa/smihandler.c b/src/soc/amd/genoa_poc/smihandler.c similarity index 100% rename from src/soc/amd/genoa/smihandler.c rename to src/soc/amd/genoa_poc/smihandler.c diff --git a/src/soc/amd/genoa/uart.c b/src/soc/amd/genoa_poc/uart.c similarity index 100% rename from src/soc/amd/genoa/uart.c rename to src/soc/amd/genoa_poc/uart.c diff --git a/src/vendorcode/amd/opensil/genoa_poc/ramstage.c b/src/vendorcode/amd/opensil/genoa_poc/ramstage.c index bee84957c6..7c0bc5b355 100644 --- a/src/vendorcode/amd/opensil/genoa_poc/ramstage.c +++ b/src/vendorcode/amd/opensil/genoa_poc/ramstage.c @@ -66,7 +66,7 @@ static void setup_rc_manager_default(void) #define NUM_XHCI_CONTROLLERS 2 static void configure_usb(void) { - const struct soc_amd_genoa_config *soc_config = config_of_soc(); + const struct soc_amd_genoa_poc_config *soc_config = config_of_soc(); const struct soc_usb_config *usb = &soc_config->usb; FCHUSB_INPUT_BLK *fch_usb_data = SilFindStructure(SilId_FchUsb, 0);