diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb b/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb
index 80dff3a67a..c62fbe273e 100644
--- a/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb
@@ -124,7 +124,7 @@ uses AMD_UCODE_PATCH_FILE
 ##
 ## ROM_SIZE is the size of boot ROM that this board will use.
 ##
-default ROM_SIZE=524288
+default ROM_SIZE=1024*1024
 
 ##
 ##
@@ -133,9 +133,9 @@ default ROM_SIZE=524288
 #default FALLBACK_SIZE=131072
 #default FALLBACK_SIZE=0x40000
 
-#FALLBACK: 512K - 4K
-default FALLBACK_SIZE=0x7f000
-#FAILOVER: 4k
+#FALLBACK: 1024K - 8K
+default FALLBACK_SIZE=0xFE000
+#FAILOVER: 8k
 default FAILOVER_SIZE=0x02000
 
 #more 1M for pgtbl
diff --git a/targets/amd/serengeti_cheetah_fam10/Config.lb b/targets/amd/serengeti_cheetah_fam10/Config.lb
index 6598542c6b..cad35150b6 100644
--- a/targets/amd/serengeti_cheetah_fam10/Config.lb
+++ b/targets/amd/serengeti_cheetah_fam10/Config.lb
@@ -30,7 +30,7 @@ mainboard amd/serengeti_cheetah_fam10
 	option  MAXIMUM_CONSOLE_LOGLEVEL=9
 
 # 512KB ROM
-option ROM_SIZE=512*1024
+option ROM_SIZE=1024*1024
 
 # Cheetah Family 10
 #romimage "normal"
@@ -50,9 +50,9 @@ romimage "fallback"
 	option USE_FALLBACK_IMAGE=1
 #	option ROM_IMAGE_SIZE=0x13800
 #	option ROM_IMAGE_SIZE=0x19800
-	option ROM_IMAGE_SIZE=0x3f000
+	option ROM_IMAGE_SIZE=0x7f000
 #	option ROM_IMAGE_SIZE=0x15800
-	option XIP_ROM_SIZE=0x40000
+	option XIP_ROM_SIZE=0x80000
 	option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback"
 	payload ../payload.elf
 end